Complete, High-Assurance Determination of Loop Bounds and Infeasible Paths for WCET Analysis

2016 IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2016 - Proceedings

Volumn , Issue , 2016, Pages

  Sewell, Thomas ^a   Kam, Felix ^a   Heiser, Gernot ^a  

^a UNIVERSITY OF NEW SOUTH WALES   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

BINS; PROGRAM COMPILERS; SEMANTICS; STATIC ANALYSIS;

AUTOMATIC DETERMINATION; INFEASIBLE PATHS; MANUAL INTERVENTION; REAL-TIME CODES; SEL4 MICROKERNEL; SEMANTIC INFORMATION; TRANSLATION VALIDATION; WORST-CASE EXECUTION TIME ANALYSIS;

C (PROGRAMMING LANGUAGE);

EID: 84971264812     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTAS.2016.7461326     Document Type: Conference Paper

References (40)

1. Avionics Application Software Standard Interface, Nov 2012. ARINC Standard 653.
2. James Barhorst, Todd Belote, Pam Binns, Jon Hoffman, James Paunicka, Prakash Sarathy, John Scoredos, Peter Stanfill, Douglas Stuart, and Russell Urzi. A research agenda for mixed-criticality systems. Available at http://www.cse.wustl.edu/-cdgill/CPSWEEK09 MCAR/, Apr 2009.
3. Alan C. Bromberger, A. Peri Frantz, William S. Frantz, Ann C. Hardy, Norman Hardy, Charles R. Landau, and Jonathan S. Shapiro. The KeyKOS nanokernel architecture. In USENIX WS Microkernels & other Kernel Arch., pages 95-112, Seattle, WA, US, Apr 1992.
4. Bernard Blackham and Gernot Heiser. Sequoll: a framework for model checking binaries. In RTAS, pages 97-106, Philadelphia, USA, Apr 2013.
5. Régis Blanc, Thomas A. Henzinger, Thibaud Hottelier, and Laura Kovács. ABC: algebraic bound computation for loops. In 16th Int. Conf. Logic for Progr., Artificial Intelligence & Reasoning, pages 103-118, 2010.
6. Sébastien Bardin, Philippe Herrmann, and Franck Védrine. Refinement-based CFG reconstruction from unstructured programs. In Int. Conf. Verification, Model Checking & Abstract Interpretation, pages 54-69, 2011.
7. Bernard Blackham, Mark Liffiton, and Gernot Heiser. Trickle: automated infeasible path detection using all minimal unsatisfiable subsets. In RTAS, pages 169-178, Berlin, Germany, Apr 2014.
8. Bernard Blackham, Yao Shi, Sudipta Chattopadhyay, Abhik Roychoudhury, and Gernot Heiser. Timing analysis of a protected operating system kernel. In RTSS, pages 339-348, Vienna, Austria, Nov 2011.
9. Bernard Blackham, Yao Shi, and Gernot Heiser. Improving interrupt response time in a verifiable protected microkernel. In EuroSys, pages 323-336, Bern, Switzerland, Apr 2012.
10. Christoph Cullmann and Florian Martin. Data-flow based detection of loop bounds. In 7th WS Worst-Case Execution- Time Analysis, 2007.
11. Will Dietz, Peng Li, John Regehr, and Vikram Adve. Understanding integer overflow in C/C++. In Proceedings of the 34th International Conference on Software Engineering, ICSE '12, pages 760-770, Piscataway, NJ, USA, 2012.
12. Jack B. Dennis and Earl C. Van Horn. Programming semantics for multiprogrammed computations. CACM, 9:143-155, 1966.
13. Kevin Elphinstone and Gernot Heiser. From L3 to seL4 - what have we learnt in 20 years of L4 microkernels? In SOSP, pages 133-150, Farmington, PA, USA, Nov 2013.
14. Christian Ferdinand, Reinhold Heckmann, Marc Langenbach, Florian Martin, Michael Schmidt, Henrik Theiling, Stephan Thesing, and Reinhard Wilhelm. Reliable and precise WCET determination for a real-life processor. In EMSOFT, pages 469-485, London, UK, 2001.
15. Anthony Fox and Magnus Myreen. A trustworthy monadic formalization of the ARMv7 instruction set architecture. In 1st ITP, volume 6172 of LNCS, pages 243-258, Edinburgh, UK, Jul 2010.
16. Jan Gustafsson, Adam Betts, Andreas Ermedahl, and Björn Lisper. The Mälardalen WCET benchmarks - past, present and future. In 10th WS Worst-Case Execution-Time Analysis, pages 137-147, Brussels, BE, Jul 2010.
17. Jan Gustafsson, Andreas Ermedahl, Christer Sandberg, and Björn Lisper. Automatic derivation of loop bounds and infeasible paths for WCET analysis using abstract execution. In RTSS, pages 57-66, Washington, DC, US, 2006.
18. Andr Hergenhan and Gernot Heiser. Operating systems technology for converged ECUs. In 6th Emb. Security in Cars Conf. (escar), page 3 pages, Hamburg, Germany, Nov 2008.
19. ISO. ISO26262: Road Vehicles - Functional Safety, Nov 2011.
20. Gerwin Klein, Kevin Elphinstone, Gernot Heiser, June Andronick, et al. seL4: Formal verification of an OS kernel. In SOSP, pages 207-220, Big Sky, MT, US, Oct 2009.
21. Jens Knoop, Laura Kovács, and Jakob Zwirchmayr. Symbolic loop bound computation for WCET analysis. In International Andrei Ershov Memorial Conference, 2011.
22. Jens Knoop, Laura Kovács, and Jakob Zwirchmayr. Wcet squeezing: On-demand feasibility refinement for proven precise wcet-bounds. In Proceedings of the 21st International Conference on Real-Time Networks and Systems, RTNS '13, pages 161-170, New York, NY, USA, 2013.
23. Johannes Kinder, Florian Zuleger, and Helmut Veith. An abstract interpretation-based framework for control flow reconstruction from binaries. In 10th Int. Conf. Verification, Model Checking & Abstract Interpretation, pages 214-228, 2009.
24. Paul Lokuciejewski, Daniel Cordes, Heiko Falk, and Peter Marwedel. A fast and precise static loop analysis based on abstract interpretation, program slicing and polytope models. In 7th Symp. Code Generation & Optimization, pages 136-146, Washington, DC, US, 2009.
25. Xavier Leroy. Formal verification of a realistic compiler. CACM, 52(7):107-115, 2009.
26. Anna Lyons and Gernot Heiser. Mixed-criticality support in a high-assurance, general-purpose microkernel. In WS Mixed Criticality Syst., pages 9-14, Rome, Italy, Dec 2014.
27. Jochen Liedtke. Page table structures for fine-grain virtual memory. IEEE Technical Committee on Computer Architecture Newsletter, Oct 1994.
28. Xianfeng Li, Yun Liang, Tulika Mitra, Abhik Roychoudhury. Chronos: A timing analyzer for embedded software. Science of Computer Programming Special issue on Experimental Software and Toolkit 69(1-3): 56-67, Dec 2007.
29. Toby Murray, Daniel Matichuk, Matthew Brassil, Peter Gammie, Timothy Bourke, Sean Seefried, Corey Lewis, Xin Gao, and Gerwin Klein. seL4: from general purpose to a proof of information flow enforcement. In S&P, pages 415-429, San Francisco, CA, May 2013.
30. US National Institute of Standards. Common Criteria for IT Security Evaluation, 1999. ISO Standard 15408. http://csrc.nist.gov/cc/.
31. Tobias Nipkow, Lawrence Paulson, and Markus Wenzel. Isabelle/ HOL - A Proof Assistant for Higher-Order Logic, volume 2283 of LNCS. 2002.
32. Bernhard Rieder, Peter Puschner, and Ingomar Wenzel. Using model checking to derive loop bounds of general loops within ANSI-C applications for measurement based WCET analysis. In Intelligent Solutions in Embedded Systems, 2008 International Workshop on, pages 1-7, Jul 2008.
33. RTCA. DO-178B: Software Considerations in Airborne Systems and Equipment Certification, Dec 1992.
34. RTCA. DO-178C: Software Considerations in Airborne Systems and Equipment Certification, Dec 2011.
35. Yao Shi, Bernard Blackham, and Gernot Heiser. Code optimizations using formally verified properties. In OOPSLA, pages 427-442, Indianapolis, USA, Oct 2013.
36. Thomas Sewell, Magnus Myreen, and Gerwin Klein. Translation validation for a verified OS kernel. In PLDI, pages 471-481, Seattle, Washington, USA, Jun 2013.
37. Konrad Slind and Michael Norrish. A brief overview of HOL4. In TPHOLs, pages 28-32, Montral, Canada, Aug 2008.
38. Thomas Sewell, Simon Winwood, Peter Gammie, Toby Murray, June Andronick, and Gerwin Klein. seL4 enforces integrity. In ITP, pages 325-340, Nijmegen, The Netherlands, Aug 2011.
39. Harvey Tuch, Gerwin Klein, and Michael Norrish. Types, bytes, and separation logic. In POPL, pages 97-108, Nice, France, Jan 2007.
40. Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter Puschner, Jan Staschulat, and Per Stenström. The worst-case execution-time problem-overview of methods and survey of tools. Trans. Emb. Comput. Syst., 7(3):1-53, 2008.