Redeeming IPC as a performance metric for multithreaded programs

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn 2003-January, Issue , 2003, Pages 232-243

  Lepak, K M ^a   Cain, H W ^a   Lipasti, M H ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; PARALLEL ARCHITECTURES;

FULL-SYSTEM SIMULATION; INSTRUCTIONS PER CYCLES; MULTI-THREADED PROGRAMS; NON-DETERMINISM; NONDETERMINISTIC PROGRAMS; PERFORMANCE ANALYSIS; PERFORMANCE METRICES; STATISTICAL METHODOLOGIES;

MULTITASKING;

EID: 84968853465     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACT.2003.1238019     Document Type: Conference Paper

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