Role of bonding temperature and voltage in silicon-to-glass anodic bonding

Proceedings of 4th Electronics Packaging Technology Conference, EPTC 2002

Volumn , Issue , 2002, Pages 85-90

  Wei, J ^a   Wang, Z P ^a   Xie, H ^a   Lan, Ng Fern ^a  

^a SINGAPORE INSTITUTE OF MANUFACTURING TECHNOLOGY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ANODIC OXIDATION; BOND STRENGTH (CHEMICAL); CHEMICAL BONDS; DIFFUSION BONDING; ELECTRONICS PACKAGING; GLASS; HYDROGEN BONDS; SCANNING ELECTRON MICROSCOPY; SILICON OXIDES; SILICON WAFERS; TEMPERATURE; WAFER BONDING;

BONDING INTERFACES; BONDING TEMPERATURES; EQUILIBRIUM STATE; GLASS ANODIC BONDING; HIGH TEMPERATURE; NEGATIVE ELECTRODE; SCANNING ACOUSTIC MICROSCOPY; TRANSITION PERIOD;

GLASS BONDING;

EID: 84964679038     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2002.1185603     Document Type: Conference Paper

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