Design and implementation of a coarse-grained dynamically reconfigurable hardware architecture

Proceedings - IEEE Computer Society Workshop on VLSI, WVLSI 2001

Volumn , Issue , 2001, Pages 41-46

  Becker, J ^a   Pionteck, T ^a   Habermann, C ^a   Glesner, M ^a  

^a DARMSTADT UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; HARDWARE; RECONFIGURABLE ARCHITECTURES; WIRELESS TELECOMMUNICATION SYSTEMS;

APPLICATION FIELDS; DARMSTADT UNIVERSITY OF TECHNOLOGY; DESIGN AND IMPLEMENTATIONS; DISTRIBUTED ARITHMETIC; HARDWARE STRUCTURES; RECONFIGURABLE COMPUTING; VHDL IMPLEMENTATION; WIRELESS COMMUNICATION SYSTEM;

RECONFIGURABLE HARDWARE;

EID: 84964414087     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWV.2001.923138     Document Type: Conference Paper

References (15)

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