A comparative study of steganography designs based on multiple FPGA platforms

International Journal of Electronic Security and Digital Forensics

Volumn 8, Issue 2, 2016, Pages 164-190

  Mohd, Bassam J ^a   Hayajneh, Thaier ^b   Khalaf, Zaid Abu ^b   Vasilakos, Athanasios V ^c  

^a HASHEMITE UNIVERSITY   (Jordan)

^b NEW YORK INSTITUTE OF TECHNOLOGY   (United States)

^c LULEÅ UNIVERSITY OF TECHNOLOGY   (Sweden)

Author keywords

Data hiding; Field programmable gate array; FPGA; Information security; Modelling; Spatial steganography

Indexed keywords

LOGIC GATES; MODELS; SECURITY OF DATA; STEGANOGRAPHY; TEXTURES;

COMPARATIVE STUDIES; DATA HIDING; HARDWARE IMPLEMENTATIONS; LEAST SIGNIFICANT BITS; PERFORMANCE METRICES; PERFORMANCE METRICS; PLATFORM INDEPENDENT; RESEARCH STUDIES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84962356004     PISSN: 1751911X     EISSN: 17519128     Source Type: Journal    
DOI: 10.1504/IJESDF.2016.075589     Document Type: Article

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