Analysis and modeling of FPGA implementations of spatial steganography methods

Journal of Circuits, Systems and Computers

Volumn 23, Issue 2, 2014, Pages

  Mohd, Bassam J ^a   Hayajneh, Thaier ^a   Abed, Sa'Ed ^a   Itradat, Awni ^a  

^a HASHEMITE UNIVERSITY   (Jordan)

Author keywords

Data hiding; FPGA; Modeling; Reconfigurable hardware; Security; Spatial steganography

Indexed keywords

ANALYSIS AND MODELING; DATA HIDING; FPGA IMPLEMENTATIONS; FPGA-HARDWARE IMPLEMENTATION; HARDWARE IMPLEMENTATIONS; LEAST SIGNIFICANT BITS; PERFORMANCE METRICS; SECURITY;

ENERGY UTILIZATION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LARGE SCALE SYSTEMS; MODELS; RECONFIGURABLE HARDWARE; STEGANOGRAPHY; TELECOMMUNICATION LINKS;

HARDWARE;

EID: 84897638271     PISSN: 02181266     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0218126614500182     Document Type: Article

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