Timing yield calculation using an impulse-train approach

Proceedings - 7th Asia and South Pacific Design Automation Conference, 15th International Conference on VLSI Design, ASP-DAC/VLSI Design 2002

Volumn , Issue , 2002, Pages 219-224

  Naidu, S R ^a  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; DESIGN; INTELLIGENT SYSTEMS; MONTE CARLO METHODS; PROBABILITY DISTRIBUTIONS; RECONFIGURABLE HARDWARE; VLSI CIRCUITS;

DELAY MODELING; FAN-OUT; LOGICAL FUNCTIONS; TIMING YIELD; TRIANGULAR DISTRIBUTION;

DELAY CIRCUITS;

EID: 84962317930     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2002.994923     Document Type: Conference Paper

References (10)

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