Fabrication of GaAs-based integrated 2-bit half and full adders by novel hexagonal BDD quantum circuit approach

2001 International Semiconductor Device Research Symposium, ISDRS 2001 - Proceedings

Volumn , Issue , 2001, Pages 622-625

  Kasai, S ^a   Yumoto, M ^a   Hasegawa, H ^a  

^a HOKKAIDO UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; BINARY DECISION DIAGRAMS; BOOLEAN FUNCTIONS; GALLIUM ARSENIDE; LOGIC CIRCUITS; NANOTECHNOLOGY; QUANTUM THEORY; RECONFIGURABLE HARDWARE; SEMICONDUCTING GALLIUM; SEMICONDUCTOR DEVICES; SIGNAL PROCESSING;

BINARY DECISION DIAGRAMS (BDD); HIGH-DENSITY INTEGRATION; NANO-METER SCALE; QUANTUM CIRCUIT; QUANTUM DEVICE; ULTRA HIGH SPEED; ULTRA-LOW POWER CONSUMPTION; ULTRAHIGH DENSITY;

COMPUTER CIRCUITS;

EID: 84961821440     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISDRS.2001.984596     Document Type: Conference Paper

References (7)

1. S. Kasai, Y. Amemiya and H. Hasegawa, Tech. Dig. of IEDM 2000 (2000) 585.
2. H. Hasegawa and S Kasai, presented at Advanced Workshop on Semiconductor Nanostructures, Feb. 5-9, Queenstown, New Zealand. To appear in Physica E.
3. S. Kasai, and H. Hasegawa: presented at 59th Device Res. Conf., June 25-27, 2001.
4. S. B. Akers, IEEE Trans. Compt. C27 (1978) 509.
5. K. Yano, Y. Sasaki, K, Rikino and K. Seki, IEEE Solid-State Circuits, 31 (1996) 792.
6. S. Kasai, K. Jinushi, H. Tomozawa and H. Hasegawa, Jpn. J. Appl. Phys. 36 (1997) 1678.
7. S. Kasai and H. Hasegawa, Conf. Dig. of 58th Device Res. Conf. (2000) 155.