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Volumn , Issue , 2002, Pages 151-153

Power dissipation in optical clock distribution network for high performance ICs

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK DISTRIBUTION NETWORKS; CLOCKS; OPTICAL INTERCONNECTS;

EID: 84961736660     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2002.1014916     Document Type: Conference Paper
Times cited : (7)

References (7)
  • 1
    • 0035054909 scopus 로고    scopus 로고
    • Physical Design of a Fourth-Generation POWER GHz Microprocessor
    • C. J. Anderson et. al., "Physical Design of a Fourth-Generation POWER GHz Microprocessor," International Solid State Circuits Conference, 2001, pp. 232-233, 451.
    • (2001) International Solid State Circuits Conference
    • Anderson, C.J.1
  • 2
    • 0032206398 scopus 로고    scopus 로고
    • Clocking Design and Analysis for a 600-MHz Alpha Microprocessor
    • November
    • D. W. Bailey and B. J. Benschneider, "Clocking Design and Analysis for a 600-MHz Alpha Microprocessor," IEEE Journal of Solid State Circuits, Vol. 33, No. 11, November 1998, pp.1627-1633
    • (1998) IEEE Journal of Solid State Circuits , vol.33 , Issue.11 , pp. 1627-1633
    • Bailey, D.W.1    Benschneider, B.J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.