Optimization of high tilt pocket implant process for improving deep sub-micro PMOS device sensitivity

Proceedings of the International Conference on Ion Implantation Technology

Volumn 22-27-September-2002, Issue , 2002, Pages 13-16

  Yeh, Kenn S Y ^a   Chiang, M C ^b   Tsai, C J ^b   Wang, Y L ^b   Wang, J K ^b  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^b NONE   (Taiwan)

Author keywords

channel effect; component; formatting; pocket implante; tilt angle

Indexed keywords

CHANNEL EFFECT; COMPONENT; FORMATTING; POCKET IMPLANTE; TILT ANGLE;

ION IMPLANTATION;

EID: 84961374308     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IIT.2002.1257926     Document Type: Conference Paper

References (7)

1. T.Hori et al, VLSI Symp.1988, p.15
2. Chih-Hsien Lin, Jiunn-Jer Yang, Konard Young, and Kuang-Yi Chiu, IEDM, pp.303-306
3. S.Pidin, H.Shido, T.Yamamoto, N.Horiguchi, H.Kurata and T.Sugii, VLSI Symp. 2001, pp.35-36.
4. Nam-Sung Kim, il-Gweon Kim, Seung-Han Ok, Dong-Chan Kim, Seok-Jin Choi, Jun-Ho Choi, Ho-Yup Kwon, Dae-Young Park and Ji-Bum Kim, IEEE 2000, pp.50-53.
5. Phil Oldiges, Huilong Zhu, Kai Nordlund, IEEE 1997, pp.245-248.
6. K.M. Klein, C.Park and A.F. Tasch, IEEE Trans Electron Devicec, pp.1614-1621, 1992.
7. S.H. Yang et al., IEEE Trans. Semiconductor Manufacturing, pp. 49-58, 1996.