-
1
-
-
11744286823
-
Synthesis From Pure Behavioral Descriptions
-
Edited by R. Camposano and W. Wolf, Kluwer Academic Publishers,June
-
Y. Nakamura, K. Oguri and A. Nagoya: "Synthesis From Pure Behavioral Descriptions," High-Level VLSI Synthesis, Edited by R. Camposano and W. Wolf, Kluwer Academic Publishers, pp.205-229, June, 1991 http://www.keel.ntt.co.jp/car/parthe/
-
(1991)
High-Level VLSI Synthesis
, pp. 205-229
-
-
Nakamura, Y.1
Oguri, K.2
Nagoya, A.3
-
2
-
-
0032218710
-
Parallelization in CoCompilation for Configurable Accelerators
-
February
-
R. Hartenstein, J. Becker, M. Herz and U. Nageldinger: "Parallelization in CoCompilation for Configurable Accelerators," in Proc. of Asia and South Pacific Design Automation Conf. (ASP-DAC'98), pp. 23-33, February, 1998
-
(1998)
Proc. of Asia and South Pacific Design Automation Conf. (ASP-DAC'98)
, pp. 23-33
-
-
Hartenstein, R.1
Becker, J.2
Herz, M.3
Nageldinger, U.4
-
3
-
-
84957408336
-
Plastic Cell Architecture: Towards Reconfigurable Computing for General-Purpose
-
April
-
K. Nagami, K. Oguri, T. Shiozawa, H. Ito and R. Konishi: "Plastic Cell Architecture: Towards Reconfigurable Computing for General-Purpose," in Preliminary Proc. of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'98), April, 1998
-
(1998)
Preliminary Proc. of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'98)
-
-
Nagami, K.1
Oguri, K.2
Shiozawa, T.3
Ito, H.4
Konishi, R.5
-
4
-
-
0031678185
-
Plastic Cell Architecture for General Purpose Reconfigurable Computing," to appear
-
June
-
H. Ito, K. Oguri, K. Nagami, R. Konishi and T. Shiozawa: "Plastic Cell Architecture for General Purpose Reconfigurable Computing," to appear in Proc. of IEEE International Workshop on Rapid System Prototying (RSP'98), June, 1998
-
(1998)
Proc. of IEEE International Workshop on Rapid System Prototying (RSP'98)
-
-
Ito, H.1
Oguri, K.2
Nagami, K.3
Konishi, R.4
Shiozawa, T.5
-
5
-
-
0043283832
-
A Hardware Implementation of Constraint Satisfaction Problem Based on New Reconfigurable LSI Architecture," to appear
-
August
-
T. Shiozawa, K. Oguri, K. Nagami, H. Ito, R. Konishi and N. Imlig: " A Hardware Implementation of Constraint Satisfaction Problem Based on New Reconfigurable LSI Architecture," to appear in Proc. of International Workshop on Field Programmable Logic and Applications (FPL'98), August, 1998
-
(1998)
Proc. of International Workshop on Field Programmable Logic and Applications (FPL'98)
-
-
Shiozawa, T.1
Oguri, K.2
Nagami, K.3
Ito, H.4
Konishi, R.5
Imlig, N.6
-
8
-
-
0031344871
-
A Dynamic Reconfiguration Run-Time System
-
April
-
J. Burns, A. Donlin, J. Hogg, S. Singh and M. Wit: "A Dynamic Reconfiguration Run-Time System," in Proc. IEEE Workshop on FPGAs for Custom Computing Machines, pp. 66-75, April, 1997
-
(1997)
Proc. IEEE Workshop on FPGAs for Custom Computing Machines
, pp. 66-75
-
-
Burns, J.1
Donlin, A.2
Hogg, J.3
Singh, S.4
Wit, M.5
-
10
-
-
84957361051
-
Functional Organisms Growing on Silicon
-
Springer Verlag, October
-
P. Nussbaum, P. Marchal and Ch. Piguet: "Functional Organisms Growing on Silicon," in Proc. of The First International Conference on Evolvable Systems: From Biology to Hardware (ICES96), vol. 1259 of Lecture Notes in Computer Science, Springer Verlag, pp. 139-151, October, 1996
-
(1996)
Proc. of The First International Conference on Evolvable Systems: From Biology to Hardware (ICES96), vol. 1259 of Lecture Notes in Computer Science
, pp. 139-151
-
-
Nussbaum, P.1
Marchal, P.2
Piguet, C.3
-
11
-
-
0012051360
-
Run Time Reconfiguration of FPGAs for Scanning Geomic DataBases
-
P. Athanas and K.L. Pocek (eds.), IEEE Computer Society Press
-
E. Lemoine and D. Merceron: "Run Time Reconfiguration of FPGAs for Scanning Geomic DataBases," in Proc. FCCM95, P. Athanas and K.L. Pocek (eds.), IEEE Computer Society Press, pp. 85-89, 1995
-
(1995)
Proc. FCCM95
, pp. 85-89
-
-
Lemoine, E.1
Merceron, D.2
-
12
-
-
0003859414
-
-
Prentice Hall, ISBN 0-13-942749-X
-
S. Y. Kung: "VLSI Array Processors," Prentice Hall, ISBN 0-13-942749-X, 1988
-
(1988)
VLSI Array Processors
-
-
Kung, S.Y.1
-
14
-
-
84957408338
-
-
Departement Informatik, Institut fuer Computersysteme, ETH Zurich
-
H. Eberle, S. Gehring, S. Ludwig, and N. Wirth: "Tools for Digital Circuit Design using FPGAs," Departement Informatik, Institut fuer Computersysteme, ETH Zurich, 1994 http://www.cs.inf.ethz.ch/cs/group/wirth/projects/cad_tools/
-
(1994)
Tools for Digital Circuit Design using FPGAs
-
-
Eberle, H.1
Gehring, S.2
Ludwig, S.3
Wirth, N.4
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