-
1
-
-
0022806145
-
Cache coherence protocols: Evaluation using a multiprocessor simulation model
-
[AB86]
-
[AB86] J. Archibald, J.-L. Baer. Cache coherence protocols: evaluation using a multiprocessor simulation model. ACM Trans. Computer Systems, 4(4):273-298, 1986.
-
(1986)
ACM Trans. Computer Systems
, vol.4
, Issue.4
, pp. 273-298
-
-
Archibald, J.1
Baer, J.-L.2
-
2
-
-
0027347715
-
Lazy caching
-
[ABM93]
-
[ABM93] Y. Afek, G. Brown, M. Merritt. Lazy caching. ACM Trans. Programming Languages and Systems, 15(1):182-205, 1993.
-
(1993)
ACM Trans. Programming Languages and Systems
, vol.15
, Issue.1
, pp. 182-205
-
-
Afek, Y.1
Brown, G.2
Merritt, M.3
-
3
-
-
0030382365
-
Shared memory consistency models: A tutorial
-
[AG96]
-
[AG96] S.V. Adve, K. Gharachorloo. Shared memory consistency models: a tutorial. IEEE Computer, 29(12):66-76, 1996.
-
(1996)
IEEE Computer
, vol.29
, Issue.12
, pp. 66-76
-
-
Adve, S.V.1
Gharachorloo, K.2
-
4
-
-
33646178489
-
MOCHA: Modularity in model checking
-
LNCS, Springer-Verlag[AHM+98]
-
[AHM+98] R. Alur, T.A. Henzinger, F.Y.C. Mang, S. Qadeer, S.K. Rajamani, S. Tasiran. MOCHA: Modularity in model checking. In CAV 98: Computer Aided Verification, LNCS, pp. 521-525. Springer-Verlag, 1998.
-
(1998)
CAV 98: Computer Aided Verification
, pp. 521-525
-
-
Alur, R.1
Henzinger, T.A.2
Mang, F.Y.C.3
Qadeer, S.4
Rajamani, S.K.5
Tasiran, S.6
-
6
-
-
0024645541
-
Reasoning about networks with many identical finite state processes
-
[BCG89]
-
[BCG89] M.C. Browne, E.M. Clarke, O. Grumberg. Reasoning about networks with many identical finite state processes. Information and Computation, 81(1):13-31, 1989.
-
(1989)
Information and Computation
, vol.81
, Issue.1
, pp. 13-31
-
-
Browne, M.C.1
Clarke, E.M.2
Grumberg, O.3
-
7
-
-
0027734857
-
Verification of the Futurebus+ cache coherence protocol
-
[CGH+93]
-
[CGH+93] E.M. Clarke, O. Grumberg, H. Hiraishi, S. Jha, D.E Long, K.L. McMillan, and L.A. Ness. Verification of the Futurebus+ cache coherence protocol. In Proc. 11th IFIP WG10.2 Conf. Computer Hardware Description Languages and their Applications, pp. 15-30, 1993.
-
(1993)
Proc. 11th IFIP WG10.2 Conf. Computer Hardware Description Languages and their Applications
, pp. 15-30
-
-
Clarke, E.M.1
Grumberg, O.2
Hiraishi, H.3
Jha, S.4
Long, D.E.5
McMillan, K.L.6
Ness, L.A.7
-
8
-
-
84947927151
-
Using formal verification/analysis methods on the critical path in system design: A case study
-
LNCS 939, Springer-Verlag[EM95]
-
[EM95] A.T. Eiriksson, K.L. McMillan. Using formal verification/analysis methods on the critical path in system design: a case study. In CAV 95: Computer Aided Verification, LNCS 939, pp. 367-380. Springer-Verlag, 1995.
-
(1995)
CAV 95: Computer Aided Verification
, pp. 367-380
-
-
Eiriksson, A.T.1
McMillan, K.L.2
-
9
-
-
22044453015
-
Verification of a parameterized bus arbitration protocol
-
LNCS 1427, Springer-Verlag[EN98]
-
[EN98] E.A. Emerson, K.S. Namjoshi. Verification of a parameterized bus arbitration protocol. In CAV 98: Computer Aided Verification, LNCS 1427, pp. 452-463. Springer-Verlag, 1998.
-
(1998)
CAV 98: Computer Aided Verification
, pp. 452-463
-
-
Emerson, E.A.1
Namjoshi, K.S.2
-
11
-
-
84947232434
-
Verification of a distributed cache memory by using abstractions
-
LNCS 818, Springer-Verlag[Gra94]
-
[Gra94] S. Graf. Verification of a distributed cache memory by using abstractions. In CAV 94: Computer Aided Verification, LNCS 818, pp. 207-219. Springer-Verlag, 1994.
-
(1994)
CAV 94: Computer Aided Verification
, pp. 207-219
-
-
Graf, S.1
-
12
-
-
84947441305
-
Construction of abstract state graphs with PVS
-
LNCS 1254, Springer-Verlag[GS97]
-
[GS97] S. Graf, H. Saidi. Construction of abstract state graphs with PVS. In CAV97: Computer Aided Verification, LNCS 1254, pp. 72-83. Springer-Verlag, 1997.
-
(1997)
CAV97: Computer Aided Verification
, pp. 72-83
-
-
Graf, S.1
Saidi, H.2
-
13
-
-
0032138592
-
Multiprocessors should support simple memory consistency models
-
[Hil98]
-
[Hil98] M.D. Hill. Multiprocessors should support simple memory consistency models. IEEE Computer, 31(8):28-34, 1998.
-
(1998)
IEEE Computer
, vol.31
, Issue.8
, pp. 28-34
-
-
Hill, M.D.1
-
15
-
-
0030211668
-
Better verification through symmetry
-
[ID96]
-
[ID96] C. N. Ip, D. L. Dill. Better verification through symmetry. Formal Methods in System Design, 9(1-2):41-75, 1996.
-
(1996)
Formal Methods in System Design
, vol.9
, Issue.1-2
, pp. 41-75
-
-
Ip, C.N.1
Dill, D.L.2
-
17
-
-
0018518477
-
How to make a multiprocessor computer that correctly executes multiprocess programs
-
[Lam79]
-
[Lam79] L. Lamport. How to make a multiprocessor computer that correctly executes multiprocess programs. IEEE Trans. Computers, C-28(9):690-691, 1979.
-
(1979)
IEEE Trans. Computers
, vol.C-28
, Issue.9
, pp. 690-691
-
-
Lamport, L.1
-
18
-
-
0141731008
-
Verification of a multiprocessor cache protocol using simulation relations and higher-order logic
-
[LD92]
-
[LD92] P. Loewenstein, D.L. Dill. Verification of a multiprocessor cache protocol using simulation relations and higher-order logic. Formal Methods in System Design, 1(4):355-383, 1992.
-
(1992)
Formal Methods in System Design
, vol.1
, Issue.4
, pp. 355-383
-
-
Loewenstein, P.1
Dill, D.L.2
-
20
-
-
0002584997
-
Formal verification of the Encore Gigamax cache consistency protocol
-
Inf. Process. Soc. Japan, [MS91]
-
[MS91] K. L. McMillan, J. Schwalbe. Formal verification of the Encore Gigamax cache consistency protocol. In Proc. Symp. Shared Memory Multiprocessors, Inf. Process. Soc. Japan, pp. 242-251, 1991.
-
(1991)
Proc. Symp. Shared Memory Multiprocessors
, pp. 242-251
-
-
McMillan, K.L.1
Schwalbe, J.2
-
21
-
-
84863901125
-
The 'test model-checking' approach to the verification of formal memory models of multiprocessors
-
LNCS 1427, Springer-Verlag[NGMG98]
-
[NGMG98] R. Nalumasu, R. Ghughal, A. Mokkedem, G. Gopalakrishnan. The 'test model-checking' approach to the verification of formal memory models of multiprocessors. In CAV 98: Computer Aided Verification, LNCS 1427, pp. 464-476. Springer-Verlag, 1998.
-
(1998)
CAV 98: Computer Aided Verification
, pp. 464-476
-
-
Nalumasu, R.1
Ghughal, R.2
Mokkedem, A.3
Gopalakrishnan, G.4
-
22
-
-
0029352644
-
A new approach for the verification of cache coherence protocols
-
[PD95]
-
[PD95] F. Pong, M. Dubois. A new approach for the verification of cache coherence protocols. IEEE Trans. Parallel and Distributed Systems, 6(8):773-787, 1995.
-
(1995)
IEEE Trans. Parallel and Distributed Systems
, vol.6
, Issue.8
, pp. 773-787
-
-
Pong, F.1
Dubois, M.2
-
23
-
-
84957377771
-
Protocol verification by aggregation of distributed transactions
-
LNCS 1102, Springer-Verlag[PD96]
-
[PD96] S. Park, D.L. Dill. Protocol verification by aggregation of distributed transactions. In CAV 96: Computer Aided Verification, LNCS 1102, pp. 300-310. Springer-Verlag, 1996.
-
(1996)
CAV 96: Computer Aided Verification
, pp. 300-310
-
-
Park, S.1
Dill, D.L.2
-
24
-
-
0031630017
-
Lamport clocks: Verifying a directory cache-coherence protocol
-
[PSCH98]
-
[PSCH98] M. Plakal, D.J. Sorin, A.E. Condon, M.D. Hill. Lamport clocks: verifying a directory cache-coherence protocol. In Proc. 10th ACM Symp. Parallel Algorithms and Architectures, pp. 67-76, 1998.
-
(1998)
Proc. 10th ACM Symp. Parallel Algorithms and Architectures
, pp. 67-76
-
-
Plakal, M.1
Sorin, D.J.2
Condon, A.E.3
Hill, M.D.4
-
25
-
-
85031916820
-
Verifying properties of large sets of processes with network invariants
-
LNCS 407, Springer-Verlag[WL89]
-
[WL89] P. Wolper, V. Lovinfosse. Verifying properties of large sets of processes with network invariants. In CAV 89: Computer Aided Verification, LNCS 407, pp. 68-80. Springer-Verlag, 1989.
-
(1989)
CAV 89: Computer Aided Verification
, pp. 68-80
-
-
Wolper, P.1
Lovinfosse, V.2
|