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Volumn , Issue , 2003, Pages 210-216

Design for enhanced solder joint reliability of integrated passives device under board level drop test and thermal cycling test

Author keywords

[No Author keywords available]

Indexed keywords

DROPS; ELECTRONICS PACKAGING; PRINTED CIRCUIT BOARDS; SOLDERED JOINTS; THERMAL CYCLING;

EID: 84954039444     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2003.1271518     Document Type: Conference Paper
Times cited : (52)

References (32)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.