Improving the performance and efficiency of an adaptive amplification operation using configurable hardware

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2000-January, Issue , 2000, Pages 267-275

  Wirthlin, Michael J ^a   Morrison, Steve ^a   Graham, Paul ^a   Bray, Brian ^b  

^a Department of Electrical and Computer Engineering   (United States)

^b SANDIA NATIONAL LABORATORIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTERS; OBJECT RECOGNITION;

BLOCK MEMORY; CONFIGURABLE HARDWARE; CONFIGURABLE SYSTEMS; EMBEDDED PROCESSORS; INDUSTRY STANDARDS; MEMORY INTERFACE; OBJECT RECOGNITION SYSTEMS; PROGRAMMABLE PROCESSORS;

HARDWARE;

EID: 84949274531     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2000.903414     Document Type: Conference Paper

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