Neural networks-based parametric testing of analog IC

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn 2002-January, Issue , 2002, Pages 408-416

  Stopjakova, V ^a   Micusik, D ^a   Benuskova, L ^b   Margala, M ^c  

^a SLOVAK UNIVERSITY OF TECHNOLOGY   (Slovakia)

^b Physics and Informatics   (Slovakia)

^c UNIVERSITY OF ROCHESTER   (United States)

Author keywords

Analog circuits; Analog integrated circuits; Circuit faults; Circuit testing; Current supplies; Feedforward neural networks; Feeds; Frequency domain analysis; Integrated circuit testing; Neural networks

Indexed keywords

ANALOG CIRCUITS; ANALOG INTEGRATED CIRCUITS; BACKPROPAGATION; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DEFECTS; ELECTRIC NETWORK ANALYSIS; FAULT TOLERANCE; FEEDFORWARD NEURAL NETWORKS; FEEDING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FREQUENCY DOMAIN ANALYSIS; HARDWARE; INTEGRATED CIRCUIT TESTING; INTEGRATED CIRCUITS; NEURAL NETWORKS; VLSI CIRCUITS;

CIRCUIT FAULTS; CIRCUIT TESTING; CURRENT SUPPLIES; DYNAMIC SUPPLY CURRENTS; HARDWARE IMPLEMENTATIONS; OPTIMIZED ARCHITECTURES; PARAMETRIC APPROACH; TIME AND FREQUENCY DOMAINS;

NETWORKS (CIRCUITS);

EID: 84948961608     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFTVS.2002.1173538     Document Type: Conference Paper

References (16)

1. L. K. Horning, et al, "Measurements of Quiescent Power Supply Current for CMOS ICs in Production Testing", Proc. Int. Test Conf., 1987, pp. 300-309.
2. J.M. Soden, F. Hawkins, "IDDQ Testing and Defect Classes", Proc. IEEE Custom Int. Circuits Conf., 1995, pp.633-642.
3. J. Segura, M. Roca, D. Mateo, A. Rubio, "Built-in dynamic current sensor circuit for digital VLSI CMOS testing", Electronics Letters, vol. 30, pp.1668-1669, 1994.
4. V. Stopjakova, H. Manhaeve, M. Sidiropulos, "On-chip Transient Current Monitor for Testing of Low-Voltage CMOS IC", Proc. Design. Autom. and Test in Europe, 1999, pp. 538-542.
5. S-T. Su, R.Z. Makki, T. Nagle, "Transient Power Supply Current Monitoring-A New Test Method for CMOS VLSI Circuits", JETTA, vol. 6, pp. 23-43, 1995.
6. A. Germida, Z. Yan, J. F. Plusquellic, F. Muradali, "Defect Detection using Power Supply Transient Signal Analysis", Proc. Int. Test. Conf., 1999, pp. 67-76.
7. B. Kruseman, P. Janssen, V. Zieren, "Transient Current Testing of 0.25 mm CMOS Devices", Proc. Int. Test. Conf., 1999, pp. 47-56.
8. I.M. Bell, D.A. Camplin, G.E. Taylor, B.R. Bannister, "Supply Current Testing of Mixed Analogue and Digital ICs," Electronics Letters, vol. 27, pp. 1581, August 1991.
9. J. Arguelles, M. Martinez, S. Bracho, "Dynamic IDD test circuit for mixed-signal Ics", Electronics Letters, vol. 30, pp. 485-486, 1994.
10. R.P. Gorman, T.J. Sejnowski, "Analysis of hidden units in a layered network trained to classify sonar targets", Neural Networks, vol. 1, pp. 75-89, 1988.
11. N. Sbirrazzuoli, D. Brunel, "Computational neural networks for mapping calorimetric data: application of feedforward neural networks to kinetic parameters determination and signals filtering", Neural Computing & Applications, vol. 5, pp. 20-32, 1997.
12. J.S. Beasley, A.W. Righter, C.J. Apodaca, S. Pour-Mazafari, D. Huggett D, " IDD pulse response testing applied to complex CMOS Ics", Proc. Int. Test. Conf., pp. 32-39, 1997.
13. S. Haykin, Neural Networks-a Comprehensive Foundations, Macmillan College Publishing Co., 1994.
14. M. Riedmiller, H. Braun, "A direct adaptive method for faster backpropagation learning: the RPROP Algorithm" Proc. IEEE Int. Neural Networks, 1993, pp. 586-591.
15. S.F. Zornetzer, J.L. Davis, C. Lau, T. McKenna, An Introduction to Neural and Electronic Networks-Second Edition, Academic Press, 1995.
16. M. Sidiropulos, V. Stopjakova, H. Manhaeve, V. Musil, "An analog self-test based on differential IDD monitoring supported by differential Iout checking", Analog Integrated Circuits and Signal Processing, vol. 21, pp. 33-44, 1999.