Parallel direct solution of linear equations on FPGA-based machines

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003

Volumn , Issue , 2003, Pages

  Wang, Xiaofang ^a   Ziavras, Sotirios G ^a  

^a NEW JERSEY INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Forward backward substitution; FPGA; LU factorization; Parallel processing; SOPC

Indexed keywords

DISTRIBUTED PARAMETER NETWORKS; FACTORIZATION; LINEAR EQUATIONS; MICROPROCESSOR CHIPS; SUPERCOMPUTERS;

COMPUTATION INTENSIVES; CONFIGURABLE COMPUTING; DESIGN AND IMPLEMENTATIONS; LU FACTORIZATION; PARALLEL IMPLEMENTATIONS; PARALLEL PROCESSING; SOPC; SYSTEM ON A PROGRAMMABLE CHIPS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84947267561     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2003.1213224     Document Type: Conference Paper

References (13)

1. R. Bacher and E. Bullinger, "Application of Non-stationary Iiterative Methods to an Exact Newton-Raphson Solution Process for Power Flow Equations, " Proc. 12th PSCC Power Systems Computations Conf. , Aug. 1996, pp. 453-459.
2. D. P. Koester, S. Ranka, and G. C. Fox, "Parallel Block-Diagonal-Bordered Sparse Linear Solvers for Electrical Power System Applications, "IEEE Proc. Scal. Paral. Lib. Conf. , 1994, pp. 195-203.
3. J. J. Grainger and W. D. Stevenson, Jr. , Power System Analysis, McGraw Hill Publ. , 1994.
4. D. J. Tylavsky, et al. "Parallel Processing in Power Systems Computation, " IEEE Trans. Power Systems, Vol. 7, No 2, May 1992, pp. 629-638.
5. I. S. Duff, A. M. Erisman, and J. K. Reid, Direct Methods for Sparse Matrices, Oxford Univ. Press, Oxford, 1990.
6. A. Sangiovanni-Vincentelli, L. K. Chen, and L. O. Chua, "Node-Tearing Nodal Analysis, " Techn. Rep. ERL-M582, Electronics Research Laboratory, University of California, Berkeley, October 1976.
7. C. Fu, X. Jiao, and T. Yang, "Efficient Sparse LU Factorization with Partial Pivoting on Distributed Memory Architectures, " IEEE Trans. Paral. Distr. Systems, Vol. 9 Issue 2, Feb. 1998, pp. 109-125.
8. T. Feng and A. J. Flueck, "A Message-Passing Distributed-Memory Parallel Power Flow Algorithm, " IEEE Power Engin. Soc. Winter Meet. , Vol. 1, 2002, pp. 211-216.
9. K. Compton, S. Hauck, "Reconfigurable Computing: A Survey of Systems and Software, " ACM Comp. Surv. , Vol. 34, Issue 2, June 2002, pp. 171-210.
10. R. Tessier and W. Burleson, "Reconfigurable Computing and Digital Signal Processing: A Survey, " J. VLSI Signal Proc. , May/June 2001, pp. 8-27.
11. D. A. Buell, J. M. Arnold, and W. J. Kleinfelder, Splash 2: FPGAS in a Custom Computing Machine, IEEE Computer Society Press, Los Alamitos, CA, 1996.
12. W. Ligon, S. McMillan, G. Monn, K. Schoonover, F. Stivers, and K. Underwood. "A Re-Evaluation of the Practicality of Floating-Point Operation of FPGAS, " Proc. FCCM, 1998, pp. 206-215.
13. S. Ingersoll and S. G. Ziavras, "Dataflow Computation with Intelligent Memories Emulated on Field-Programmable Gate Arrays (FPGAS), " Microproc. Microsys. , Vol. 26, No. 6, Aug. 2002, pp. 263-280.