Design tradeoffs for embedded network processors

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2299, Issue , 2002, Pages 149-164

  Wolf, Tilman ^a   Franklin, Mark A ^a  

^a WASHINGTON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMMERCE; COMPUTER ARCHITECTURE; DATA HANDLING; DYNAMIC RANDOM ACCESS STORAGE; NETWORK ARCHITECTURE; STATIC RANDOM ACCESS STORAGE; SYSTEM-ON-CHIP; UBIQUITOUS COMPUTING;

CACHE SIZE; DATA PATHS; DESIGN TRADEOFF; EMBEDDED NETWORK; FLEXIBLE PROCESSING; PERFORMANCE MODEL; SYSTEM-ON-A-CHIP TECHNOLOGY; SYSTEMS-ON-A CHIPS;

INTEGRATED CIRCUIT DESIGN;

EID: 84947204253     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-45997-9_12     Document Type: Conference Paper

References (8)

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