Extensions to Verilog-A to support compact device modeling

Proceedings of the IEEE International Workshop on Behavioral Modeling and Simulation, BMAS

Volumn 2003-January, Issue , 2003, Pages 134-138

  Lemaitre, L ^a   Coram, G ^b   McAndrew, C ^a   Kundert, K ^c  

^a Motorola Switzerland   (Switzerland)

^b ANALOG DEVICES INC   (United States)

^c CADENCE DESIGN SYSTEMS   (United States)

Author keywords

Analog circuits; Capacitors; Circuit simulation; Computational modeling; Equations; Hardware design languages; Integrated circuit modeling; MOSFET circuits; Physics; Proposals

Indexed keywords

ANALOG CIRCUITS; BEHAVIORAL RESEARCH; CAPACITORS; CIRCUIT SIMULATION; COMPUTER SIMULATION LANGUAGES; FIELD EFFECT TRANSISTORS; PHYSICS;

COMPUTATIONAL MODEL; EQUATIONS; HARDWARE DESIGN LANGUAGE; INTEGRATED CIRCUIT MODELING; MOSFET CIRCUITS; PROPOSALS;

MODELING LANGUAGES;

EID: 84945179629     PISSN: 21603804     EISSN: 21603812     Source Type: Conference Proceeding    
DOI: 10.1109/BMAS.2003.1249872     Document Type: Conference Paper

References (8)

1. http://www-device.eecs.berkeley.edu/~bsim3/
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3. M. Mierzwinski, P. O'Halloran, B. Troyanovsky and R. Dutton, "Changing the Paradigm for Compact Model Integration in Circuit Simulators Using Verilog-A," Proc. Nanotech, pp. 376-379, 2003.
4. L. Lemaitre, C. McAndrew, and W. Grabinski, "Standardization of Compact Device modeling in High Level Description Language," Proc. Nanotech, pp. 372-375, 2003.
5. Open Verilog International, "Verilog-AMS, Language Reference Manual," Version 1.9, Dec. 15, 1999.
6. http://www.accellera.org/
7. http://www.bipm.fr/enus/3-SI/base-units.html
8. J. Victory, C. C. McAndrew, and K. Gullapalli, "A Time-Dependent, Surface Potential Based Compact Model for MOS Capacitors," IEEE EDL, vol. 22, no. 5, pp. 245-247, May 2001.