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Volumn 2, Issue , 2003, Pages 376-379

Changing the paradigm for compact model integration in circuit simulators using Verilog-A

Author keywords

Analog simulation; Compact models; Verilog A

Indexed keywords

END USERS; INFRASTRUCTURE; MODEL EQUATIONS; NUMERICAL TOLERANCES;

EID: 6344293764     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (12)

References (7)
  • 2
    • 84862443010 scopus 로고    scopus 로고
    • Accellera Verilog Analog Mixed-Signal Group: http://www.eda.org/verilog- ams/index.html.
  • 4
    • 84862440756 scopus 로고    scopus 로고
    • CMC: http://www.eigroup.org/cmc/.
  • 5
    • 0013301390 scopus 로고
    • Electronics Research Laboratory, University of California, Berkeley
    • T.I. Quarles, "The SPICE3 Implemetation Guide," ERL-M44. Electronics Research Laboratory, University of California, Berkeley, 1989.
    • (1989) The SPICE3 Implemetation Guide , vol.ERL-M44
    • Quarles, T.I.1
  • 7
    • 84862446909 scopus 로고    scopus 로고
    • Sept. 27
    • CMC meeting minutes, Sept. 27, 2002: http://www.eigroup.org/cmc/minutes/ m092702.htm.
    • (2002) CMC Meeting Minutes


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.