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Volumn 2, Issue , 2003, Pages 376-379
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Changing the paradigm for compact model integration in circuit simulators using Verilog-A
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Author keywords
Analog simulation; Compact models; Verilog A
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Indexed keywords
END USERS;
INFRASTRUCTURE;
MODEL EQUATIONS;
NUMERICAL TOLERANCES;
AUTOMATION;
C (PROGRAMMING LANGUAGE);
CODES (STANDARDS);
COMPUTER SIMULATION;
MATHEMATICAL MODELS;
PROGRAM COMPILERS;
NETWORKS (CIRCUITS);
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EID: 6344293764
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (12)
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References (7)
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