Fault diagnosis and logic debugging using Boolean satisfiability

Proceedings - International Workshop on Microprocessor Test and Verification

Volumn 2003-January, Issue , 2003, Pages 60-65

  Veneris, A ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

Boolean functions; Bridge circuits; Circuit faults; Circuit testing; Debugging; Dictionaries; Fault diagnosis; Hardware design languages; Logic design; Very large scale integration

Indexed keywords

BOOLEAN FUNCTIONS; BRIDGE CIRCUITS; COMPUTER DEBUGGING; ECONOMIC AND SOCIAL EFFECTS; EMBEDDED SYSTEMS; FAILURE ANALYSIS; FORMAL LOGIC; GLOSSARIES; INTEGRATION TESTING; LOGIC CIRCUITS; LOGIC DESIGN; MICROPROCESSOR CHIPS; PROGRAM DIAGNOSTICS; SEQUENTIAL CIRCUITS; VLSI CIRCUITS;

BOOLEAN SATISFIABILITY; CIRCUIT FAULTS; CIRCUIT TESTING; DIAGNOSIS TOOLS; HARDWARE DESIGN LANGUAGE; LOGIC DEBUGGING; SATISFIABILITY ALGORITHMS; TEST GENERATIONS;

FAULT DETECTION;

EID: 84944033437     PISSN: 15504093     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MTV.2003.1250264     Document Type: Conference Paper

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