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Volumn 2003-January, Issue , 2003, Pages 251-260

Reconfigurable computing application frameworks

Author keywords

Application software; Application specific integrated circuits; Computer aided manufacturing; Computer applications; Design automation; Electronic design automation and methodology; Field programmable gate arrays; Hardware; Random access memory; Software design

Indexed keywords

APPLICATION PROGRAMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; AVAILABILITY; COMPUTER AIDED DESIGN; COMPUTER AIDED LOGIC DESIGN; COMPUTER AIDED MANUFACTURING; COMPUTER APPLICATIONS; COMPUTER HARDWARE; COMPUTER INTEGRATED MANUFACTURING; COMPUTERS; HARDWARE; INTEGRATED CIRCUIT DESIGN; LOGIC GATES; RANDOM ACCESS STORAGE; RECONFIGURABLE ARCHITECTURES; SIGNAL RECEIVERS; SOFTWARE DESIGN;

EID: 84942935350     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2003.1227260     Document Type: Conference Paper
Times cited : (12)

References (14)
  • 1
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    • JHDL - An HDL for reconfigurable systems
    • J. M. Arnold and K. L. Pocek, editors, Napa, CA, April IEEE Computer Society, IEEE Computer Society Press
    • P. Bellows and B. L. Hutchings. JHDL - an HDL for reconfigurable systems. In J. M. Arnold and K. L. Pocek, editors, Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, pages 175-184, Napa, CA, April 1998. IEEE Computer Society, IEEE Computer Society Press.
    • (1998) Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines , pp. 175-184
    • Bellows, P.1    Hutchings, B.L.2
  • 2
    • 85014409954 scopus 로고    scopus 로고
    • The systolic array genetic algorithm, an example of systolic arrays as a reconfigurable design methodology
    • K. Pocek and J. Arnold, editors, Napa Valley, CA, USA
    • I. M. Bland and G. Megson. The systolic array genetic algorithm, an example of systolic arrays as a reconfigurable design methodology. In K. Pocek and J. Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 260-261, Napa Valley, CA, USA, 1998.
    • (1998) IEEE Symposium on FPGAs for Custom Computing Machines , pp. 260-261
    • Bland, I.M.1    Megson, G.2
  • 3
    • 84957926695 scopus 로고
    • Data-folding in SRAM configurable FPGAs
    • D. A. Buell and K. L. Pocek, editors, Napa, CA, Apr.
    • P. W. Foulk. Data-folding in SRAM configurable FPGAs. In D. A. Buell and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 163-171, Napa, CA, Apr. 1993.
    • (1993) Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines , pp. 163-171
    • Foulk, P.W.1
  • 5
    • 84950148992 scopus 로고
    • Searching genetic databases on Splash 2
    • D. A. Buell and K. L. Pocek, editors, Napa, CA, Apr.
    • D. T. Hoang. Searching genetic databases on Splash 2. In D. A. Buell and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 185-191, Napa, CA, Apr. 1993.
    • (1993) Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines , pp. 185-191
    • Hoang, D.T.1
  • 10
    • 0022219496 scopus 로고
    • A systolic array for rapid string comparison
    • H. Fuchs, editor, Computer Science Press
    • R. J. Lipton and D. Lopresti. A systolic array for rapid string comparison. In H. Fuchs, editor, 1985 Chapel Hill Conference on VLSI, pages 363-376. Computer Science Press, 1985.
    • (1985) 1985 Chapel Hill Conference on VLSI , pp. 363-376
    • Lipton, R.J.1    Lopresti, D.2
  • 12
    • 17444398765 scopus 로고    scopus 로고
    • Is acceleration hardware the wave of the future?
    • July
    • S. Salamone. Is acceleration hardware the wave of the future? Bio-IT World, July 2002.
    • (2002) Bio-IT World
    • Salamone, S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.