Nonideal battery and main memory effects on CPU speed-setting for low power

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 9, Issue 1, 2001, Pages 29-34

  Martin, Thomas L ^a   Siewiorek, Daniel P ^b  

^a UNIVERSITY OF ALABAMA IN HUNTSVILLE   (United States)

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Battery modeling; Low power design; Low power dissipation; System level; Tradeoffs; Variable voltage

Indexed keywords

BANDWIDTH; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; ELECTRIC POWER SUPPLIES TO APPARATUS; REAL TIME SYSTEMS; SYSTEMS ANALYSIS;

BATTERY CAPACITY; MAIN MEMORY BANDWIDTH;

HAND HELD COMPUTERS;

EID: 0035242910     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.920816     Document Type: Article

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