A 60GHz 28nm UTBB FD-SOI CMOS reconfigurable power amplifier with 21% PAE, 18.2dBm P1dB and 74mW PDC

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 58, Issue , 2015, Pages 48-49

  Larie, Aurélien ^a,b   Kerhervé, Eric ^b   Martineau, Baudouin ^a,c   Vogt, Lionel ^a   Belot, Didier ^a,c  

^a STMICROELECTRONICS   (France)

^b UNIVERSITÉ DE BORDEAUX   (France)

^c CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS;

HIGH DATA RATE WIRELESS; INTEGRATED POWER AMPLIFIERS; MODULATED POWER; OFDM MODULATION; PEAK TO AVERAGE POWER RATIO; RECONFIGURABLE POWER AMPLIFIERS; SOI CMOS; SYSTEM REQUIREMENTS;

POWER AMPLIFIERS;

EID: 84940745089     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2015.7062919     Document Type: Conference Paper

References (7)

1. S. Kulkarni et al., "A Push-Pull mm-Wave Power Amplifier with <0.8° AM-PM Distortion in 40nm CMOS. ISSCC Dig. Tech. Papers. pp 252-253, Feb. 2014
2. D. Zhao et al., "A 60-GHz Dual-Mode Class AB Power Amplifier in 40-nm CMOS," IEEE J. Solid-State Circuits, vol.48, no.10, pp. 2323-2337, Oct. 2013.
3. D. Zhao, et al., "A 60-GHz Outphasing Transmitter in 40-nm CMOS," IEEE J. Solid-State Circuits, vol.47, no.12, pp. 3172-3183, Dec. 2012.
4. A. Siligaris et al., "A 60GHz Power Amplifier With 14.5dBm Saturation Power and 25% Peak PAE in CMOS 65nm SOI," IEEE J. Solid-State Circuits, vol.45, no.7, pp.1286-1294, July 2010.
5. J. Chen, et al., "A Digitally Modulated mm-Wave Cartesian Beamforming Transmitter with Quadrature Spatial Combining," ISSCC Dig. Tech. Papers, pp. 232-233, Feb. 2013.
6. E. Kaymaksut et al., "E-band Transformer-based Doherty Power Amplifier in 40nm CMOS," IEEE Radio Frequency Integrated Circuits Symp., pp.167-170, June 2014.
7. E. Cohen, et al., "Robust 60GHz 90nm and 40nm CMOS Wideband Neutralized Amplifiers with 23dB gain 4.6dB NF and 24% PAE," IEEE SiRF, pp.207-210, Jan. 2012.