Enhanced clustered voltage scaling for low power

GLSVLSI 2002 - Proceedings of the 12th ACM Great Lakes Symposium on VLSI

Volumn , Issue , 2002, Pages 18-23

  Donno, Monica ^a   MacChiarulo, Luca ^a   MacIi, Alberto ^a   MacIi, Enrico ^a   Poncino, Massimo ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

VLSI CIRCUITS;

BREADTH-FIRST; CLUSTERED VOLTAGE SCALING; COMMERCIAL TOOLS; DEPTH FIRST; LOW POWER; QUALITY OF RESULTS; THROUGH POWER; TIMING ANALYSIS;

VOLTAGE SCALING;

EID: 84936967526     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/505306.505311     Document Type: Conference Paper

References (10)

1. K. Usami, M. Horowitz, " Clustered Voltage Scaling Technique for Low-Power Design" ISLPD'95: International Symposium on Low-Power Design, pp.3-8, Dana Point, CA, 1995.
2. J.-M. Chang, M. Pedram, " Energy Minimization Using Multiple Supply Voltages" ISLPD'96: International Symposium on Low-Power Design, pp.157-162, Monterey, CA, 1996.
3. N. Otsuka, M. Horowitz, " Circuit Techniques for 1.5-V Power Supply Flash Memory " IEEE Journal of Solid State Circuits vol. 32, No. 8, pp.1217-1230, August 1997.
4. Y. Kanno, H. Mizuno, K. Tanaka, T. Watanabe, " Level Converters with High Immunity to Power-Supply Bouncing for High-Speed Sub-1-V LSIs " 2000 IEEE Symposium on VLSI Circuits, pp. 202-203, 2000.
5. F. Brglez, H. Fujiwara, " A Neutral Netlist of 10 Combinational Benchmark Circuits and a Target Translator in Fortran" ISCAS'85: IEEE International Symposium on Circuits and Systems, pp.785-794, 1985.
6. C. Yeh, M.-C. Chang "Gate-Level Voltage Scaling for Low-Power Design Using Multiple Supply Voltages", IEE Proceedings-Circuits, Devices and Systems, Vol. 146, No. 6, pp. 334-339, 1999.
7. J.-M. Chang, M. Pedram " Energy Minimization Using Multiple Supply Voltages" IEEE Transactions on VLSI Systems, Vol 5., No. 4, pp. 1-8, 1997.
8. C. Chen, M. Sarrafzadeh " Provably Good Algorithm for Low Power Consumption with Dual Supply Voltages" ICCAD'99: ACM/IEEE International Conference on CAD, pp. 76-79, San Jose, CA, 1999.
9. V. Sundararajan, K. K. Parhi " Synthesis of Low Power CMOS VLSI Circuits using Dual Supply Voltages" DAC-36: 36th ACM Design Automation Conference, pp.72-75, New Orleans, LA, 1999.
10. Synopsys DesignCompiler, http://www.synopsys.com.