Majority-inverter graph: A novel data-structure and algorithms for efficient logic optimization

Proceedings - Design Automation Conference

Volumn , Issue , 2014, Pages

  Amarú, Luca ^a   Gaillardon, Pierre Emmanuel ^a   De Micheli, Giovanni ^a  

^a EPFL   (Switzerland)

Author keywords

Boolean Algebra; DAG; Logic Synthesis; Majority Logic

Indexed keywords

ALGEBRA; ALGORITHMS; BOOLEAN ALGEBRA; BOOLEAN FUNCTIONS; COMPUTER AIDED DESIGN; MAJORITY LOGIC;

DAG; DIRECTED ACYCLIC GRAPH (DAG); INVERTER OPERATIONS; LOGIC REPRESENTATION; LOGIC SYNTHESIS; OPTIMIZATION TECHNIQUES; REPRESENTATION SPACE; TRANSFORMATION RULES;

STRUCTURAL OPTIMIZATION;

EID: 84903130344     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2593069.2593158     Document Type: Conference Paper

References (20)

1. G. De Micheli, Synthesis and Optimization of Digital Circuits, McGraw- Hill, New York, 1994.
2. R.L. Rudell, A. Sangiovanni-Vincentelli, Multiple-valued minimization for PLA optimization, IEEE Trans. CAD, 6(5): 727-750, 1987.
3. R.K. Brayton, et al., MIS: A Multiple-Level Logic Optimization System, IEEE Trans. CAD, 6(6): 1062-1081, 1987.
4. E. Sentovich, et al., SIS: A System for Sequential Circuit Synthesis, ERL, Dept. EECS, Univ. California, Berkeley, UCB/ERL M92/41, 1992.
5. R. Brayton, A. Mishchenko, ABC: An Academic Industrial-Strength Verification Tool, Proc. CAV, 2010.
6. R.E. Bryant, Graph-based algorithms for Boolean function manipulation, IEEE Trans. on Comp., C-35(8): 677-691, 1986.
7. C. Yang and M. Ciesielski, BDS: A BDD-Based Logic Optimization System, IEEE Trans. CAD, 21(7): 866-876, 2002.
8. ABC synthesis tool- available online.
9. K. Bernstein et al., Device and Architecture Outlook for Beyond CMOS Switches, Proceedings of the IEEE, 98(12): 2169-2184, 2010.
10. K. J. Chen, et al., InP-based high-performance logic elements using resonant-tunneling devices, IEEE Electr. Dev. Lett., 17(3): 127-129, 1996.
11. P. D. Tougaw, C. S. Lent, Logical devices implemented using quantum cellular automata, J. Applied Physics, 75(3): 1811-1817, 1994.
12. M. De Marchi et al., Polarity control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs, Proc. IEDM, 2012.
13. John R. Isbell, Median algebra, Trans. Amer. Math. Soc., 319-362, 1980.
14. D. Knuth, The Art of Computer Programming, Volume 4A, Part 1, New Jersey: Addison-Wesley, 2011
15. Predictive Technology Models- available online ptm.asu.com.
16. T. Sasao, Switching Theory for Logic Synthesis, Springer, 1999.
17. G. Birkhoff, Lattice Theory, Amer. Math. Soc., New York, 1967
18. G. Birkhoff, A ternary operation in distributive lattices, Bull. of the Amer. Math. Soc., 53 (1): 749752, 1947.
19. M. Stone, The Theory of Representations of Boolean Algebras, Trans. Amer. Math. Soc. 40: 37-111, 1936.
20. S. Abramsky, Domain theory in logical form, Annals of Pure and Applied Logic, 51: 177, 1991.