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Volumn , Issue , 2007, Pages
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A cost-efficient residual prediction VLSI architecture for H. 264/AVC scalable extension
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Author keywords
[No Author keywords available]
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Indexed keywords
CODING PERFORMANCE;
FRACTIONAL MOTION ESTIMATION;
HARDWARE ARCHITECTURE;
INTEGER MOTION ESTIMATION;
INTER-LAYER PREDICTION;
PREDICTION SCHEMES;
PROPOSED ARCHITECTURES;
SOFTWARE ACCELERATION;
HADAMARD TRANSFORMS;
HARDWARE;
MOTION ESTIMATION;
MOTION PICTURE EXPERTS GROUP STANDARDS;
FORECASTING;
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EID: 84898070315
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (5)
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References (8)
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