Investigation, evaluation, and optimization of stray inductance in laminated busbar

IEEE Transactions on Power Electronics

Volumn 29, Issue 7, 2014, Pages 3679-3693

  Chen, Cai ^a   Pei, Xuejun ^a   Chen, Yu ^a   Kang, Yong ^a  

^a HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (China)

Author keywords

Current commutation loop (CCL); finite element analysis (FEA); impedance resonant; laminated busbar

Indexed keywords

CURRENT COMMUTATION; DIFFERENT VOLTAGES; HIGH-POWER INVERTERS; NEUTRAL POINT CLAMPED INVERTERS; SEPARATION DISTANCES; STRAY INDUCTANCES; THREE-DIMENSIONAL (3-D) FINITE ELEMENT ANALYSIS (FEA); VOLTAGE OVERSHOOT;

BUSBARS; ELECTRIC COMMUTATION; ELECTRIC INVERTERS; ELECTROMAGNETIC COMPATIBILITY; FINITE ELEMENT METHOD; INDUCTANCE; INSULATED GATE BIPOLAR TRANSISTORS (IGBT); MULTILAYERS; OPTIMIZATION; VOLTAGE REGULATORS;

LAMINATING;

EID: 84897680897     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2013.2282621     Document Type: Article

References (21)

1. J. L. Schanen, E. Clavel, and J. Roudet, "Modeling of lowinductive busbar connections," IEEE Ind. Applicat. Mag., vol. 2, no. 4, pp. 39-43, Sep./Oct. 1996.
2. H. J. Beukes, J. H. R. Enslin, and R. Spee, "Busbar design considerations for high Power IGBT converters," in Proc. 12th APEC, 1997, pp. 847-853.
3. Z. Lounis and B. Davat, "Minimization ofwiring inductance in high power IGBT inverter," IEEE Trans. Power Del., vol. 15, no. 2, pp. 551-555, Apr. 2000.
4. M. A. Vogelsberger, T. Wiesinger, and H. Ertl, "Life-cycle monitoring and voltage-managing unit for DC-link electrolytic capacitors in PWM converters," IEEE Trans. Power Electron., vol. 26, no. 2, pp. 493-503, Feb. 2011.
5. K. Fink and S. Bernet, "Advanced gate drive unit with closed-loop diC/dt control," IEEE Trans. Power Electron., vol. 26, no. 7, pp. 2587-2595, May 2013.
6. M. C.Caponet, F. Profumo, R. W. D. Doncker, andA. Tenconi, "Lowstray inductance bus bar design and construction for good EMC performance in power electronic circuits," IEEE Trans. Power Electron., vol. 17, no. 2, pp. 225-231, Mar. 2002. (Pubitemid 34307377)
7. F. Zare and G. F. Ledwich, "Reduced layer planar busbar for voltage source inverters," IEEE Trans. Power Electron., vol. 17, no. 4, pp. 508-516, Jul. 2002. (Pubitemid 34861811)
8. C. Chen, X.-J. Pei, S. Yunhao, L. Xinchun, L. Xinming, and K. Yong, "Modeling and optimization of high power inverter three-layer laminated busbar," in Proc. 4th ECCE, 2012, pp. 1380-1385.
9. P. Ranstad and H.-P. Nee, "On dynamic effects influencing IGBT losses in soft-switching converters," IEEE Trans. Power Electron., vol. 26, no. 1, pp. 260-271, Jan. 2011.
10. R. Hausmann and I. Barbi, "Three-phase DC-AC converter using fourstate switching cell," IEEE Trans. Power Electron., vol. 26, no. 7, pp. 1857-1867, Jul. 2011.
11. B. Gultekin and M. Ermis, "Cascaded multilevel converter-based transmission STATCOM: System design methodology and development of a 12 kV ±12 MVAr power stage," IEEE Trans. Power Electron., vol. 28, no. 11, pp. 4930-4950, Nov. 2013.
12. A. T. Bryant, K. K. Vadlapati, J. P. Starkey, A. P. Goldney, S. Y. Kandilidis, and D. A. Hinchley, "Current distribution in high power laminated busbars," in Proc. 14th Eur. Conf. EPE, 2011, pp. 1-10.
13. H. Wen and W. Xiao, "Design and optimization of laminated busbar to reduce transient voltage spike," in Proc. 21th ISIE, 2012, pp. 1478-1483.
14. J.Wang, B. Yang, J. Zhao, Y. Deng, X. He, and X. Zhixin, "Development of a compact 750 KVA three-phase NPC three-level universal inverter module with specifically designed busbar," in Proc. 25th APEC, 2010, pp. 1266-1271.
15. L. Popova, T. Musikka, R. Juntunen, M. Lohtander, P. Silventoinen, O. Pyrhonen, and J. Pyrhonen, "Modeling of low inductive busbars for medium voltage three-level NPC inverter," in Proc. IEEE PEMWA 2012, pp. 1-7.
16. F. Z. Peng,W. Jin, Z. Fan, and Q. Zhaoming, "Development of a 1.5MVA universal converter module for traction drive and utility applications," in Proc. PESC, 2005, pp. 2290-2295. (Pubitemid 46379496)
17. H. Zhu, A. R. Hefner, and J.-S. Lai, "Characterization of power electronics system interconnect parasitics using time domain reflectometry," IEEE Trans. Power Electron., vol. 14, no. 4, pp. 622-628, Jul. 1999.
18. J. M. Guichon, J. Aime, J. L. Schanen, C. Martin, J. Roudet, E. Clavell, M. Arpilliere, R. Pasterczyk, and Y. Le Floch, "Busbar design: How to spare nanohenries ," in Proc. Conf. IEEE IAS Annu. Meeting, 2006, pp. 1865-1869. (Pubitemid 47514861)
19. C. M. R. J. Pasterczyk, J.-M. Guichon, and J.-L. Schanen, "Planar busbar optimization regarding current sharing and stray inductance mininization," in Proc. Eur. Conf. on EPE-ECCE, 2005, pp. 1-9.
20. Ansys Ansoft Maxwell2D/3D software, Ansoft (2010). [Online]. Available: http://www.ansoft.com/
21. F. Zare and G. Ledwich, "A plane busbar impedance calculation using MAXWELL's equations," in Proc. 11th ISH, 1999, pp. 2.148.P6-2.151.P6.