-
1
-
-
0141768997
-
On the implementation of a package for efficient representation and manipulation of functional decision diagrams
-
Becker, B., Drechsler, R., Theobald, M.: On the implementation of a package for efficient representation and manipulation of functional decision diagrams. IFIP WG 10.5 Workshop on Applications of the Reed-Muller Expression in Circuit Design, pp. 162-169, 1993
-
(1993)
IFIP WG 10.5 Workshop On Applications of the Reed-Muller Expression In Circuit Design
, pp. 162-169
-
-
Becker, B.1
Drechsler, R.2
Theobald, M.3
-
2
-
-
33747834679
-
MIS: A multiple-level logic optimization system
-
Brayton, R.K., Rudell, R., Sangiovanni-Vincentelli, A., Wang, A.R.: MIS: a multiple-level logic optimization system. IEEE Trans. on Computer-Aided Design 6(6): 1062-1081, 1987
-
(1987)
IEEE Trans. On Computer-Aided Design
, vol.6
, Issue.6
, pp. 1062-1081
-
-
Brayton, R.K.1
Rudell, R.2
Sangiovanni-Vincentelli, A.3
Wang, A.R.4
-
4
-
-
0026973232
-
Implicit and incremental computation of primes and essential primes of Boolean functions
-
June
-
Coudert, O., Madre, J.C.: Implicit and incremental computation of primes and essential primes of Boolean functions. In: Proc. of 29th ACM/IEEE Design Automation Conf. (DAC'92), pp. 36-39, June 1992
-
(1992)
Proc. of 29th ACM/IEEE Design Automation Conf. (DAC'92)
, pp. 36-39
-
-
Coudert, O.1
Madre, J.C.2
-
5
-
-
0027189117
-
Anew viewpoint of two-level logic optimization
-
June
-
Coudert, O., Madre, J.C., and Fraisse, H.: Anew viewpoint of two-level logic optimization. In: Proc. of 30th ACM/IEEE Design Automation Conf. (DAC'93), pp. 625-630, June 1993
-
(1993)
Proc. of 30th ACM/IEEE Design Automation Conf. (DAC'93)
, pp. 625-630
-
-
Coudert, O.1
Madre, J.C.2
Fraisse, H.3
-
6
-
-
0343284285
-
-
Digital Paris Research Lab., December
-
Coudert, O., Madre, J.C., Touati, H.: TiGeR Version 1.0 User Guide. Digital Paris Research Lab., December 1993
-
(1993)
TiGeR Version 1.0 User Guide
-
-
Coudert, O.1
Madre, J.C.2
Touati, H.3
-
8
-
-
0028721243
-
Fast OFDD-based minimization of fixed polarity Reed-Muller expressions
-
Drechsler, R., Theobald, M., Becker, B.: Fast OFDD-based minimization of fixed polarity Reed-Muller expressions. Proc. of Eur. Conf. on Design Automation, pp. 2-7, 1994
-
(1994)
Proc. of Eur. Conf. On Design Automation
, pp. 2-7
-
-
Drechsler, R.1
Theobald, M.2
Becker, B.3
-
10
-
-
0002612059
-
Multilevel logic synthesis based on functional decision diagrams
-
March
-
Kebschull, U., Schubert, E., Rosenstiel, W.: Multilevel logic synthesis based on functional decision diagrams. Proc. of Eur. Conf. on Design Automation, pp. 43-47, March 1992
-
(1992)
Proc. of Eur. Conf. On Design Automation
, pp. 43-47
-
-
Kebschull, U.1
Schubert, E.2
Rosenstiel, W.3
-
11
-
-
0026882239
-
On the OBDD-representation of general Boolean functions
-
June
-
Liaw, H.-T., Lin, C.-S.: On the OBDD-representation of general Boolean functions. IEEE Trans. on Computers C-41(6): pp. 661-664, June 1992
-
(1992)
IEEE Trans. On Computers
, vol.C-41
, Issue.6
, pp. 661-664
-
-
Liaw, H.-T.1
Lin, C.-S.2
-
13
-
-
0006035460
-
The number of knight's tour equals 33, 439, 123, 484, 294 counting with binary decision diagrams
-
3:#R5
-
M. Löbbing, Wegener, I.: The number of knight's tour equals 33, 439, 123, 484, 294 counting with binary decision diagrams. The Electronic J. Combinatorics 3:#R5, 1996
-
(1996)
The Electronic J. Combinatorics
-
-
Löbbing, M.1
Wegener, I.2
-
19
-
-
0030125025
-
Fast factorization method for implicit cube set representation
-
Apr
-
Minato, S.: Fast factorization method for implicit cube set representation. IEEE Trans. on CAD 15(4), pp. 377-384, Apr. 1996
-
(1996)
IEEE Trans. On CAD
, vol.15
, Issue.4
, pp. 377-384
-
-
Minato, S.1
-
20
-
-
0031119337
-
-
Formal Methods in System Design, Kluwer Academic, Boston, Mass., USA
-
Minato, S.: Arithmetic Boolean expression manipulator using BDDs. Formal Methods in System Design, Kluwer Academic, Boston, Mass., USA 10: 221-242, 1997
-
(1997)
Arithmetic Boolean Expression Manipulator Using BDDs
, vol.10
, pp. 221-242
-
-
Minato, S.1
-
21
-
-
0014798170
-
Recursive operators for prime implicant and irredundant normal form determination
-
June
-
Morreale, E.: Recursive operators for prime implicant and irredundant normal form determination. IEEE Trans. Comput. C-19(6): 504-509, June 1970
-
(1970)
IEEE Trans. Comput
, vol.C-19
, Issue.6
, pp. 504-509
-
-
Morreale, E.1
-
22
-
-
0024645936
-
Petri nets: Properties, analysis and applications
-
Murata, T.: Petri nets: properties, analysis and applications. Proc. of the IEEE 77(4): 541-580, 1989
-
(1989)
Proc. of the IEEE
, vol.77
, Issue.4
, pp. 541-580
-
-
Murata, T.1
-
23
-
-
0024753283
-
The transduction method design of logic networks based on permissible functions
-
October
-
Muroga, S., Kambayashi, Y., Lai, H.C., Culliney, J.N.: The transduction method design of logic networks based on permissible functions. IEEE Trans. on Computers Vol. C-38, 10: 1404-1424, October 1987
-
(1987)
IEEE Trans. On Computers
, vol.C-38
, Issue.10
, pp. 1404-1424
-
-
Muroga, S.1
Kambayashi, Y.2
Lai, H.C.3
Culliney, J.N.4
-
24
-
-
0027795477
-
Breadth-first manipulation of very large binary-decision diagrams
-
November
-
Ochi, H., Yasuoka, K., Yajima, S.: Breadth-first manipulation of very large binary-decision diagrams. In: Proc. Of IEEE/ACM Int. Conf. on Computer-Aided Design (ICCAD'93), pp. 48-55, November 1993
-
(1993)
Proc. of IEEE/ACM Int. Conf. On Computer-Aided Design (ICCAD'93)
, pp. 48-55
-
-
Ochi, H.1
Yasuoka, K.2
Yajima, S.3
-
25
-
-
0006075034
-
Reducing combinatorial explosions in solving search-type combinatorial problems with binary decision diagram
-
Okuno, H.G.: Reducing combinatorial explosions in solving search-type combinatorial problems with binary decision diagram. Trans. of Information Processing Society of Japan (IPSJ), (in Japanese) 35(5): 739-753, 1994
-
(1994)
Trans. of Information Processing Society of Japan (IPSJ), (in Japanese)
, vol.35
, Issue.5
, pp. 739-753
-
-
Okuno, H.G.1
-
26
-
-
0042764696
-
On the properties of combination set operations
-
Okuno, H.G., Minato, S., Isozaki, H.: On the properties of combination set operations. Information Processing Letters 66: 195-199, 1998
-
(1998)
Information Processing Letters
, vol.66
, pp. 195-199
-
-
Okuno, H.G.1
Minato, S.2
Isozaki, H.3
-
27
-
-
0007425644
-
-
Public software. Univ. of California, Berkeley, Calif., USA, June
-
Ranjan, R.K., Sanghavi, J.: CAL-2.0: breadth-first manipulation-based BDD library. Public software. Univ. of California, Berkeley, Calif., USA, June 1997. http://www-cad.eecs.berkeley.edu/Research/cal_bdd/
-
(1997)
CAL-2.0: Breadth-first Manipulation-based BDD Library
-
-
Ranjan, R.K.1
Sanghavi, J.2
-
28
-
-
0004000699
-
-
Public Software. University of Colorado, Boulder, Colo., USA, April
-
Somenzi, F.: CUDD: CU decision diagram package. Public Software. University of Colorado, Boulder, Colo., USA, April 1997. http://vlsi.colorado.edu/fabio/CUDD
-
(1997)
CUDD: CU Decision Diagram Package
-
-
Somenzi, F.1
-
29
-
-
0027084255
-
Fault simulation for multiple faults using BDD representation of fault sets
-
November
-
Takahashi, N., Ishiura, N., Yajima, S.: Fault simulation for multiple faults using BDD representation of fault sets. Proc. of IEEE/ACM In. Conf. on Computer-Aided Design (IC-CAD'91), pp. 550-553, November 1991
-
(1991)
Proc. of IEEE/ACM In. Conf. On Computer-Aided Design (IC-CAD'91)
, pp. 550-553
-
-
Takahashi, N.1
Ishiura, N.2
Yajima, S.3
-
30
-
-
0028533061
-
The size of reduced OBDDs and optimal readonce branching programs for almost all Boolean functions
-
November
-
Wegener, I.: The size of reduced OBDDs and optimal readonce branching programs for almost all Boolean functions. IEEE Trans. on Computers C-43(11): 1262-1269, November 1994
-
(1994)
IEEE Trans. On Computers
, vol.C-43
, Issue.11
, pp. 1262-1269
-
-
Wegener, I.1
-
31
-
-
84957708535
-
BDDs Vs. Zero-suppressed BDDs: For CTL Symbolic Model Checking of Petri Nets
-
FMCAD'96, Palo Alto, Calif., USA, November
-
Yoneda, T., Hatori, H., Takahara, A., Minato, S.: BDDs vs. zero-suppressed BDDs: for CTL symbolic model checking of Petri nets. Proc. of 1st Int. Conf. on Formal Method in Computer Design (FMCAD'96, Palo Alto, Calif., USA, pp. 435-449, November, 1996
-
(1996)
Proc. of 1st Int. Conf. On Formal Method In Computer Design
-
-
Yoneda, T.1
Hatori, H.2
Takahara, A.3
Minato, S.4
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