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Volumn , Issue , 2003, Pages 275-280

Future design tools for platform FPGAs

Author keywords

Application specific integrated circuits; Concurrent computing; Costs; Digital signal processing; Electronics industry; Embedded software; Field programmable gate arrays; Logic design; Silicon; System level design

Indexed keywords

APPLICATION PROGRAMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTATION THEORY; COSTS; DESIGN; DIGITAL INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; ELECTRONICS INDUSTRY; EMBEDDED SOFTWARE; INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUITS; LOGIC DESIGN; SEMICONDUCTOR DEVICE MANUFACTURE; SIGNAL PROCESSING; SILICON; SYSTEMS ANALYSIS;

EID: 84893194732     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2003.1232841     Document Type: Conference Paper
Times cited : (4)

References (18)
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  • 2
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  • 3
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    • K. Keutzer et al, "System-Level Design: Orthogonalization of Concerns and Platform-Based Design", Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, Volume 19, Issue 12, Dec. 2000, pp. 1523-1543.
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  • 13
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    • Taming heterogeneity - The Ptolemy approach
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    • E. Janneck et al, "Taming heterogeneity - the Ptolemy approach", Proc. of the IEEE, Vol. 91 Issue: 1, Jan. 2003, pp 127-144
    • (2003) Proc. of the IEEE , vol.91 , Issue.1 , pp. 127-144
    • Janneck, E.1
  • 15
    • 0041693948 scopus 로고    scopus 로고
    • Using Transactional Level Models in a SoC Design Environment
    • Eds. W. Müller, W. Rosenstiel and J. Kluwer Academic Press, May
    • A. Clouard et al, "Using Transactional Level Models in a SoC Design Environment" in SystemC Methodologies and Applications, Eds. W. Müller, W. Rosenstiel and J. Kluwer Academic Press, May 2003, pp. 29-63.
    • (2003) SystemC Methodologies and Applications , pp. 29-63
    • Clouard, A.1
  • 16
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    • Y. Chika, www.eetimes.com/pressreleases/prnewswire/84467
    • Chika, Y.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.