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Volumn 4, Issue , 2001, Pages 374-377

A single-chip CMOS front-end receiver architecture for multi-standard wireless applications

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG FRONT-END; BUILDING BLOCKES; FRONT-END RECEIVER; MULTI-STANDARD; MULTI-STANDARD APPLICATIONS; NOVEL ARCHITECTURE; RECEIVER ARCHITECTURE; WIRELESS APPLICATION;

EID: 84888042071     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.922251     Document Type: Conference Paper
Times cited : (11)

References (11)
  • 1
    • 0032208090 scopus 로고    scopus 로고
    • WCDMA - The radio interface for future mobile multimedia communications
    • November
    • Erik Dahlman, PerBeming and et al. "WCDMA-The Radio Interface for Future Mobile multimedia Communications," IEEE Transactions on Vehicular Technology, Vol. 47, No. 4, November 1998, ppl 105-1118.
    • (1998) IEEE Transactions on Vehicular Technology , vol.47 , Issue.4
    • Dahlman, E.1    Beming, P.2
  • 2
    • 0031377461 scopus 로고    scopus 로고
    • 1.9GHz Wide-band if double conversion cmos integrated receiver for cordless telephone applications
    • J. Rudell et al., " 1.9GHz Wide-Band IF Double Conversion CMOS Integrated Receiver for Cordless Telephone Applications," IE EE J. of Solid-State Circuits, pp. 20712088.
    • IEEE J. of Solid-State Circuits , pp. 2071-2088
    • Rudell, J.1
  • 4
    • 84888036362 scopus 로고
    • Application of zero-if radio architecture to multistandard compatible ratio systems
    • 26-28 September, conference Publication
    • Alfonso Fernandez-Duran and et al, "Application of Zero-IF Radio Architecture to Multistandard Compatible Ratio Systems," Radio Receivers and Associated Systems, 26-28 September 1995, conference Publication, pp. 81-86
    • (1995) Radio Receivers and Associated Systems , pp. 81-86
    • Fernandez-Duran, A.1
  • 7
    • 0032123891 scopus 로고    scopus 로고
    • A 15-b resolution 2-mhz nyquist rate sigma-delta adc in a 1-um cmos technology
    • July
    • Augusto Manuel Marques et al.,"A 15-b Resolution 2-MHz Nyquist Rate Sigma-Delta ADC in a 1-um CMOS Technology" IEEE J. of Solid-State Circuits, vol.33, No.7, July 1998, pp. 1065-1075.
    • (1998) IEEE J. of Solid-State Circuits , vol.33 , Issue.7 , pp. 1065-1075
    • Manuel, M.A.1
  • 9
    • 0344771175 scopus 로고    scopus 로고
    • A 13bit, 2.2.Ms/s, 55mw multibit cascade sigma-delta modulator in cmos 0.7um single-poly technology
    • June
    • Fernanado Medeiro and et al. "A 13bit, 2.2.MS/s, 55mW Multibit Cascade Sigma-delta Modulator in CMOS 0.7um Single-Poly Technology", IEEE Journal Solid-State Circuits, Vol. 34, No. 6, June 1999, pp. 748-760.
    • (1999) IEEE Journal Solid-State Circuits , vol.34 , Issue.6 , pp. 748-760
    • Medeiro, F.1
  • 10
    • 0026400093 scopus 로고
    • A 50mhz multibit sigma-delta modulator for 12b 2mhz a/d conversion
    • Dec
    • B. Brandt and B. A. Wooley, "A 50MHz Multibit sigma-delta modulator for 12b 2MHz A/D conversion," IEEE J. Solid-State Circuits, vol.26, pp. 1746-1756, Dec. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 1746-1756
    • Brandt, B.1    Wooley, B.A.2
  • 11
    • 0034429813 scopus 로고    scopus 로고
    • A 90db snr, 2.5mhz output rate adc using cascaded multibit a-z modulation at 8x oversampling ratio
    • Ichiro Fujimor and et. al, "A 90dB SNR, 2.5MHz Output Rate ADC using Cascaded Multibit A-Z Modulation at 8x Oversampling Ratio," Proceeding of 2000 IEEE International Solid-State Circuits Conference, pp. 338-339.
    • Proceeding of 2000 IEEE International Solid-State Circuits Conference , pp. 338-339
    • Fujimor, I.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.