Adaptive cache aware bitier work-stealing in multisocket multicore architectures

IEEE Transactions on Parallel and Distributed Systems

Volumn 24, Issue 12, 2013, Pages 2334-2343

  Chen, Quan ^a   Guo, Minyi ^a   Huang, Zhiyi ^b  

^a SHANGHAI JIAO TONG UNIVERSITY   (China)

^b UNIVERSITY OF OTAGO   (New Zealand)

Author keywords

Cache aware; Divide and conquer programs; Multisocket multicore architectures; Work stealing

Indexed keywords

CACHE AWARE; DIRECTED ACYCLIC GRAPH (DAG); DIVIDE AND CONQUER; MEMORY FOOTPRINT; MEMORY-BOUND APPLICATIONS; MULTICORE ARCHITECTURES; SHARED CACHE; WORK-STEALING;

SCHEDULING;

SOFTWARE ARCHITECTURE;

EID: 84887962188     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPDS.2012.322     Document Type: Article

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