A superscalar processor model for limited functional units using instruction dependencies

25th International Conference on Computers and Their Applications 2010, CATA 2010

Volumn , Issue , 2010, Pages 294-299

  Lee, Jongbok ^a  

^a Hansung University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BRANCH MISPREDICTIONS; FUNCTIONAL UNITS; INSTRUCTION CACHE MISS; INSTRUCTION PER CYCLES; INSTRUCTION WINDOWS; PERFORMANCE MODEL; SIMULATION PROCESS; SUPERSCALAR PROCESSOR;

COMPUTER SIMULATION;

EID: 84883618366     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. D. B. Noonburg and J. P. Shen, "A Framework for Statistical Modeling of Superscalar Processor Performance" in Proceedings on Third International Symposium on High Performance Computer Architecture, 1997.
2. L. Eeckhout, R. H. Bell Jr., B. Stougie, K. D. Bosschere, and L. K. John, "Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies" in International Symposium on Performance Analysis of Systems and Software, 2004.
3. P.K. Dubey, G.B. Adams III, and M. J. Flynn, "Instruction Window Size Trade-Offs and Characterization of Program Parallelism" IEEE Transactions on Computers, Vol. 43, pp. 431-442, Apr. 1994.
4. T. S. Karkhanis and J.E. Smith, "A First - Order Superscalar Processor Model" in Proceedings of the 31st Annual Symposium on Computer Architecture, 2004.
5. E.M. Riseman and C.C. Foster, "The inhibition of potential parallelism" IEEE Transactions on Computers, Vol. C-21, pp. 1405-1411, Dec. 1972.
6. P. Michaud, A. Seznec, and S. Jourdan, "Exploring Instruction Fetch Bandwidth Requirement in Wide Issue Superscalar Processors" in International Symposium on Parallel Architectures and Compilation Techniques, 1999.
7. T. Austin, E. Larson, and D. Ernest, "SimpleScalar: An Infrastructure for Computer System Modeling" Computer, Vol. 35, no. 2, pp. 59-67, Feb. 2002.
8. T-Y. Yeh and Y.N. Patt, "Two-Level Adaptive Branch Prediction" in The 24th ACM/IEEE Intl Sym and Workshop on Microarchitecture, Nov. 1991, pp. 51-61.
9. Greg Hamerly, Erez Perelman, Jeremy Lau, and Brad Calder, "SimPoint 3.0: Faster and More Flexible Program Analysis" in Workshop on Modeling, Benchmarking and Simulation, Jun. 2005.