RNS implementation of high performance filters for satellite demultiplexing

IEEE Aerospace Conference Proceedings

Volumn 3, Issue , 2003, Pages 1365-1379

  Cardarilli, G C ^a   Re, A D ^a   Lojacono, R ^a   Nannarelli, A ^a   Re, M ^a  

^a UNIVERSITY OF ROME TOR VERGATA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY REPRESENTATIONS; CIRCUIT COMPLEXITY; DYNAMIC RANGE; FILTER COEFFICIENTS; HIGH PERFORMANCE FILTER; REMOTE OPERATION; RESIDUE NUMBER SYSTEM;

NUMBERING SYSTEMS; SPACE APPLICATIONS;

DIGITAL FILTERS;

EID: 84879382128     PISSN: 1095323X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AERO.2003.1235253     Document Type: Conference Paper

References (14)

1. N.S. Szabo and R.I. Tanaka, Residue Arithmetic and its Applications in Computer Technology, New York: McGraw-Hill, 1967.
2. M.A. Sodestrand, W.K. Jenkins, G. A. Jullien, and E J. Taylor, Residue Number System Arithmetic: Modem Applications in Digital Signal Processing, New York: IEEE Press, 1986.
3. P.E. Pace, P. A. Ramamoorthy, and D. Styer, "A Preprocessing Architecture for Resolution Enhancement in High-speed Analog-to-Digital Converters," IEEE Trans. On Circuits and Systems, vol. 11, pp. 373-379, 1994.
4. A. Nannarelli, M. Re, A. Del Re, GC. Cardarilli, and R. Lojacono, "High Speed RNS AD Front End," Proceedings of 6th European Workshop on ADC Modelling and Testing, pp. 19-22, September 2001.
5. G. C. Cardarilli, M. Re, R. Lojacono, and G. Ferri, "A New Efficient Architecture for BinaIy to RNS Conversion," European Conference on Circuit Theory and Design ECCTD'99, vol. 11, pp. 1151-1 154, September 1999.
6. M. Bhardwaj and A. Balaram, "Low power signal processing architectures using residue arithmetic," Proceedings of IEEE International Conference on Acoustics, Speech and Signal Processing (ASSP'98), vol. 5
7. W.L. Freking and K.K. Parhi, "Low-power digital filters using residue arithmetic," Thirty-First Asilomar Conference on Signals, Systems and Computers, vol. 1, pp. 739-743,1998.
8. A. Del Re, A. Nannarelli, and M. Re, "Implementation of Digital Filters in Carry-Save Residue Number System," Proc. of 35th Asilomar Conference on Signals, Systems, and Computers, pp. 1309-1 3 13, Nov. 2001.
9. I.M. Vinogradov, An Introduction to the Theory of Numbers, New York Pergamon Press, 1955.
10. K.M. Elleyth and M.A. Bayoumi, "Fast and Flexible Architectures for RNS Arithmetic Decoding," IEEE Trans.Circuits Systems.-I1 Analog and Digital Signal Processing, vol. 39, pp. 226-235, April 1992.
11. F. Barsi, "Mod m Arithmetic in Binary Systems," Znformation Processing Letters, vol. 40, pp. 303-309, December 199 l.
12. G Cardarilli, M. Re, and R. Lojacono, "A residue to binary conversion algorithm for signed numbers," European Conference on Circuit Theory and Design (ECCTD' 97), vol. 3, pp. 1454-1459
13. Israel Koren, Computer Arithmetic Algorithms, Division and Square Prentice-Hall, Inc. , 1993.
14. M.D. Ercegovac and T. Lang, Root: Digit-Recurrence Algorithms and Implementations, Kluwer Academic Publisher, 1994.