Implementation of digital filters in carry-save residue number system

Conference Record of the Asilomar Conference on Signals, Systems and Computers

Volumn 2, Issue , 2001, Pages 1309-1313

  Del Re, Andrea ^a   Nannarelli, Alberto ^a   Re, Marco ^a  

^a UNIVERSITY OF ROME TOR VERGATA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POWER SUPPLIES TO APPARATUS; ENERGY DISSIPATION; SIGNAL PROCESSING; TELECOMMUNICATION EQUIPMENT;

BINARY SYSTEMS; POWER DISSIPATION; RESIDUE NUMBER SYSTEM;

FIR FILTERS;

EID: 0035573814     PISSN: 10586393     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/acssc.2001.987702     Document Type: Conference Paper

References (11)

1. VLSI implementation of very high-order FIR filters
2. A high-speed realization of a residue to binary number system converter
3. FPGA implementation of RNS to binary signed conversion architecture
4. Tradeoffs between residue number system and traditional FIR filters
5. Clustered voltage scaling technique for low-power design