V830R/AV: Embedded multimedia superscalar RISC processor

IEEE Micro

Volumn 18, Issue 2, 1998, Pages 36-47

  Suzuki, Kazumasa ^a,b,c   Arai, Tomohisa ^a,c,d   Nadehara, Kouhei ^a,c,e   Kuroda, Ichiro ^a,c,d  

^a NEC CORPORATION   (Japan)

^b WASEDA UNIVERSITY   (Japan)

^c IEEE   (United States)

^d UNIVERSITY OF TOKYO   (Japan)

^e OSAKA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; DECODING; IMAGE CODING; INTERFACES (COMPUTER); MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS; RANDOM ACCESS STORAGE; REAL TIME SYSTEMS; STANDARDS; SUPERCOMPUTERS;

CENTRAL PROCESSING UNIT (CPU); MULTIMEDIA SUPERSCALAR PROCESSOR;

REDUCED INSTRUCTION SET COMPUTING;

EID: 0032027434     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/40.671401     Document Type: Article

References (9)

1. M. Mizuno et al., "A 1.5W Single-chip MPEG2 MP@ML Encoder with Low-Power Motion Estimation and Clocking," Int'l Solid-State Circuits Conf. '97 Digest of Technical Papers, IEEE, Piscataway, N.J., Feb. 1997, pp. 256-257.
2. M. Tremblay et al., "VIS Speeds New Media Processing," IEEE Micro, Aug. 1996, pp. 10-20.
3. L. Gwennap, "Intel's MMX Speeds Multimedia," Microprocessor Report, Vol. 10, No. 3, Mar. 5, 1996, pp. 1, 6-10.
4. M. Ikekawa et al., "A Real-Time Software MPEG-2 Decoder for Multimedia PCs," Proc. Int'l Conf. Consumer Electronics, IEEE, New York, June 1997, pp. 2-3.
5. ISO/IEC 13818-2, "Information Technology - Generic Coding of Moving Pictures and Associated Audio," International Organization for Standardization, Geneva, 1995.
6. K. Nadehara et al., "Low-Power Multimedia RISC," IEEE Micro, Vol. 15, No. 6, Dec. 1995, pp. 20-29.
7. "IEEE Standard Specifications for the Implementations of 8×8 Inverse Discrete Cosine Transform," Std. 1180-1190, IEEE, Dec. 1990.
8. K. Suzuki et al., "Multiply-Add Calculator with Symmetric Rounding," Proc. 1997 IEICE General Conf. (in Japanese), Inst. Electronics, Information, and Comm. Engineers, Tokyo, Mar. 1997, p. 174.
9. K. Nadehara, H. Lieske, and I. Kuroda, "Software MPEG-2 Video Decoder on a 200-MHz, Low-power Multimedia Microprocessor," submitted to IEEE Int'l Conf. Acoustics, Speech, and Signal Processing, to be held May 12-15,1998, Seattle, Wash.