Parallel implementation of Gray Level Co-occurrence Matrices and Haralick texture features on cell architecture

Journal of Supercomputing

Volumn 59, Issue 3, 2012, Pages 1455-1477

  Shahbahrami, Asadollah ^a   Pham, Tuan Anh ^b   Bertels, Koen ^b  

^a UNIVERSITY OF GUILAN   (Iran)

^b Department of Microelectronics   (Netherlands)

Author keywords

Cell architecture; Co occurrence matrix; Parallel techniques; Texture feature extraction

Indexed keywords

ALGORITHMS; CONTENT BASED RETRIEVAL; IMAGE PROCESSING;

CELL ARCHITECTURES; CO-OCCURRENCE-MATRIX; CONTENT BASED IMAGE RETRIEVAL; GRAY-LEVEL CO-OCCURRENCE MATRIX; IMAGE PROCESSING APPLICATIONS; PARALLEL TECHNIQUES; SYNERGISTIC PROCESSOR ELEMENT; TEXTURE FEATURE EXTRACTION;

TEXTURES;

EID: 84876771282     PISSN: 09208542     EISSN: 15730484     Source Type: Journal    
DOI: 10.1007/s11227-011-0556-x     Document Type: Article

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