FPGA architecture for fast parallel computation of co-occurrence matrices

Microprocessors and Microsystems

Volumn 31, Issue 2, 2007, Pages 160-165

  Iakovidis, D K ^a   Maroulis, D E ^a   Bariamis, D G ^a  

^a UNIVERSITY OF ATHENS   (Greece)

Author keywords

Co occurrence matrix; FPGA; Image analysis; Texture

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; IMAGE ANALYSIS; OPTIMIZATION; PROGRAM PROCESSORS; THROUGHPUT;

COOCCURRENCE MATRIX; FAST PARALLEL COMPUTATION; SOFTWARE IMPLEMENTATION; THROUGHPUT IMAGE ANALYSIS APPLICATIONS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 33846919630     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.micpro.2006.02.013     Document Type: Article

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