Development of the ASICs for the NA62 pixel Gigatracker

Proceedings of the Topical Workshop on Electronics for Particle Physics, TWEPP 2008

Volumn , Issue , 2008, Pages 90-94

  Jarron, P ^a   Ceccucci, A ^a   Kaplon, J ^a   Kluge, A ^a   Osmic, F ^a   Riedler, P ^a   Tiuraniemi, S ^a   Dellacasa, G ^b   Marchetto, F ^d   Mazza, G ^b   Rivetti, A ^b   Martoiu, S ^a   Fiorini, M ^c   Cotta Ramusino, A ^c   Martin Albarran, E ^d  

^a CERN   (Switzerland)

^b SEZIONE DI TORINO   (Italy)

^c INFN SEZIONE DI FERRARA   (Italy)

^d NONE

Author keywords

[No Author keywords available]

Indexed keywords

HIT RATE; PIXEL CELLS; PIXEL DETECTOR; READOUT ASIC; READOUT ELECTRONICS; SPICE SIMULATIONS; TIME STAMPS;

READOUT SYSTEMS;

PIXELS;

EID: 84876695655     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. G. Dellacasa et al. Pixel readout architecture for the NA62 Gigatracker, TWEPP 2008-09-26 in this conference
2. E. Baldinger and W. Franzen, Advances in Electronics and Electron Physics, academic Press, 1956.
3. Frais-Kölbl, H Griesmayer, E Kagan, H Pernegger, H A fast low-noise charged-particle CVD diamond detector, IEEE Trans. Nucl. Sci. 51 (2004) 3833-3837
4. A. Deutsch., G. V. Kopcsay, V. A. Ranieri, J. K. Cataldo, E. A. Galligan, W. S. Graham, R. P. McGouey, S. L. Nunes, J. R. Paraszczak, J.J. Ritsko, R. J. Serino, D. Y. Shih, and J. S. Wilczynski, "High-speed signal propagation on lossy transmission lines," IBM J. Res. Develop. Vol. 34, pp. 601-615, 1990.
5. R. E. Collin, Field Theory of Guided Waves. New York: McGraw-Hill, 1960, pp. 124-125
6. Michael P. Flynn and Joshua Jaeyoung Kang, Global Signaling over Lossy Transmission Lines, ICCAD 2005 conference proceedings, pp. 982-989
7. Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, van Tuijl, and Bram Nauta, A 3-Gb/s/ch Transceiver for 10-mm Uninterrupted RC-Limited Global On-Chip Interconnects, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 41, NO. 1, JANUARY 2006 pp. 297
8. Christer Svensson and Peter Caputa, High bandwidth, Low Latency Global Interconnect, internal document of Dept. of Electrical Engineering, 2008 Linköping University, 581 83 Linköping, Sweden
9. F. Anghinolfi, P. Jarron, A.N. Martemiyanov, E. Usenko, H. Wenninger, M.C.S. Williams, and A. Zichichi, NINO: an ultra-fast and low-power frontend amplifier/discriminator ASIC designed for the multigap resistive plate chamber, NIMA Volume 533, Issues 1-2, 1 November 2004, Pages 183-187
10. M. Mota, J. Christiansen, A High-Resolution Time Interpolator Based on a Delay Locked Loop, IEEE Journal of Solid-State Circuits, Vol. 34, No. 10, Oct. 1999, pp 1360-1366
11. C. Mester, A multi-channel 24.4 ps bin size Time-to-Digital Converter for HEP applications, TWEPP 2008-09-26, in this conference