40nm embedded SG-MONOS flash macros for automotive with 160MHz random access for code and endurance over 10M cycles for data

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 56, Issue , 2013, Pages 212-213

  Kono, Takashi ^a   Ito, Takashi ^a   Tsuruda, Tamaki ^a   Nishiyama, Takayuki ^a   Nagasawa, Tsutomu ^a   Ogawa, Tomoya ^a   Kawashima, Yoshiyuki ^a   Hidaka, Hideto ^a   Yamauchi, Tadaaki ^a  

^a RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT TECHNOLOGY; DATA RELIABILITY; EMBEDDED FLASH MEMORY (E-FLASH); HIGH TEMPERATURE; OPERATING CONDITION; PROGRAM/ERASE; RANDOM ACCESS;

REAL TIME CONTROL;

EID: 84876517910     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2013.6487704     Document Type: Conference Paper

References (5)

1. D. Shum et al., "Highly Reliable Flash Memory with Selfaligned Split-gate Cell Embedded into High Performance 65nm CMOS for Automotive & Smartcard Applications", IEEE IMW, pp.139-142, 2012.
2. T. Tanaka et al., "A 512kB MONOS type Flash Memory Module Embedded in a Microcontroller", Symposium on VLSI Circuits, Dig. of Tech., pp.211-212, 2003.
3. M. Jefremow et al., "Bitline-Capacitance-Cancelation Sensing Scheme with 11ns Read Latency and Maximum Read Throughput of 2.9GB/s in 65nm Embedded Flash for Automotive", ISSCC Dig. Tech. Papers, pp. 428-429, 2012.
4. M.-F. Chang et al., "An Offset-Tolerant Current-Sampling-Based Sense Amplifier for Sub-100nA-Cell-Current Nonvolatile Memory", ISSCC Dig. Tech. Papers, pp. 206-208, 2011
5. S. Kawai et al., "An 8kB EEPROM-Emulation DataFLASH Module for Automotive MCU", ISSCC Dig. Tech. Papers, pp. 508-509, 2008.