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Volumn , Issue , 2012, Pages 1529-1532

Hardware-aware motion estimation search algorithm development for high-efficiency video coding (HEVC) standard

Author keywords

hardware aware; HEVC; motion estimation; motion search algorithm

Indexed keywords

BANDWIDTH SAVINGS; FAST SEARCH ALGORITHM; HARDWARE IMPLEMENTATIONS; HARDWARE-AWARE; HEVC; HIGH-EFFICIENCY VIDEO CODING; INTEGER MOTION ESTIMATION; MOTION ESTIMATION SEARCH ALGORITHM; MOTION SEARCH ALGORITHM; OFF-CHIP; ON-CHIP REFERENCES; SEARCH ALGORITHMS;

EID: 84875843295     PISSN: 15224880     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICIP.2012.6467163     Document Type: Conference Paper
Times cited : (14)

References (7)
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  • 3
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    • May
    • Yu-Wen Huang et al., "Hardware Architecture Design for Variable Block Size Motion Estimation in MPEG-4 AVC/JVT/ITU-T H.264," in ISCAS, May 2003, vol. 2, pp. II-796 - II-799.
    • (2003) ISCAS , vol.2
    • Huang, Y.-W.1
  • 4
    • 3543021496 scopus 로고    scopus 로고
    • A VLSI architecture for variable block size video motion estimation
    • July
    • Swee Yeow Yap et al., "A VLSI Architecture for Variable Block Size Video Motion Estimation," Circuits and Systems II: Express Briefs, IEEE Tran. on, vol. 51, no. 7, pp. 384 - 389, July 2004.
    • (2004) Circuits and Systems II: Express Briefs, IEEE Tran. on , vol.51 , Issue.7 , pp. 384-389
    • Yap, S.Y.1
  • 5
    • 78651087096 scopus 로고    scopus 로고
    • Robust global motion estimation using motion vectors of variable size blocks and automatic motion model selection
    • Sept.
    • M. Haller et al., "Robust global motion estimation using motion vectors of variable size blocks and automatic motion model selection," in IEEE ICIP, Sept. 2010, pp. 737 -740.
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    • Haller, M.1
  • 6
    • 34547548628 scopus 로고    scopus 로고
    • PMRME: A parallel multi-resolution motion estimation algorithm and architecture for HDTV sized H.264 video coding
    • April
    • Chia-Chun Lin et al., "PMRME: A Parallel Multi-Resolution Motion Estimation Algorithm and Architecture for HDTV Sized H.264 Video Coding," in IEEE ICASSP, April 2007, vol. 2, pp. II-385 -II-388.
    • (2007) IEEE ICASSP , vol.2
    • Lin, C.-C.1
  • 7
    • 34548833276 scopus 로고    scopus 로고
    • A 7mW-to-183mW dynamic quality-scalable H.264 video encoder chip
    • Feb.
    • Hsiu-Cheng Chang et al., "A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip," in IEEE ISSCC, Feb. 2007, pp. 280 -603.
    • (2007) IEEE ISSCC , pp. 280-603
    • Chang, H.-C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.