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Volumn , Issue , 2013, Pages 123-133

From relational verification to SIMD loop synthesis

Author keywords

program vectorization; relational verification; synthesis

Indexed keywords

COMPILER TECHNOLOGY; CORRECTNESS PROOFS; SIMD ARCHITECTURE; SYNTHESIS ALGORITHMS; SYNTHESIS CONDITIONS; SYNTHESIS TECHNIQUES; VECTORIZATION; VERIFICATION METHOD;

EID: 84875205533     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2442516.2442529     Document Type: Conference Paper
Times cited : (46)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.