An improved real-time hardware architecture for Canny edge detection based on FPGA

ICICIP 2012 - 2012 3rd International Conference on Intelligent Control and Information Processing

Volumn , Issue , 2012, Pages 445-449

  Li, Xiaoyang ^a   Jiang, Jie ^a   Fan, Qiaoyun ^a  

^a BEIHANG UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

CANNY EDGE DETECTION; CANNY EDGE DETECTORS; EDGE DETECTION ALGORITHMS; HARDWARE ARCHITECTURE; HARDWARE IMPLEMENTATIONS; PROCESSING SPEED; REAL-TIME APPLICATION; REAL-TIME HARDWARE;

DATA PROCESSING; EDGE DETECTION; INTELLIGENT CONTROL; OBJECT RECOGNITION;

HARDWARE;

EID: 84872295907     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICICIP.2012.6391408     Document Type: Conference Paper

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