Real-time canny edge detection parallel implementation for FPGAs

2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings

Volumn , Issue , 2010, Pages 499-502

  Gentsos, Christos ^a   Sotiropoulou, Calliope Louisa ^a   Nikolaidis, Spiridon ^a   Vassiliadis, Nikolaos ^b  

^a ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

^b INSTITUTE OF NANOSCIENCE AND NANOTECHNOLOGY   (Greece)

Author keywords

Canny edge detection; FPGA; Parallel architecture; Real time

Indexed keywords

CANNY EDGE DETECTION; CANNY EDGE DETECTORS; DIGITAL IMAGE PROCESSING; EDGE DETECTION ALGORITHMS; EDGE DETECTORS; FPGA; FPGA IMPLEMENTATIONS; FRAMES PER SECONDS; HIGH THROUGHPUT; HIGH-RESOLUTION IMAGE PROCESSING; ON CHIP MEMORY; PARALLEL IMPLEMENTATIONS; PIXEL PARALLEL; REAL TIME; REAL TIME RESPONSE; SIMULATION RESULT;

ALGORITHMS; DETECTORS; IMAGE PROCESSING; IMAGING SYSTEMS; PARALLEL ARCHITECTURES;

EDGE DETECTION;

EID: 79953110053     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2010.5724558     Document Type: Conference Paper

References (7)

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