Demonstration of addressable organic resistive memory utilizing a PC-interface memory cell tester

IEEE Electron Device Letters

Volumn 34, Issue 1, 2013, Pages 51-53

  Cho, Byungjin ^a,b   Song, Sunghoon ^a   Ji, Yongsung ^a   Choi, Ho Gil ^a   Ko, Heung Cho ^a   Lee, Jae Suk ^a   Jung, Gun Young ^a   Lee, Takhee ^c  

^a Gwangju Institute of Science and Technology (GIST)   (South Korea)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c Seoul National University   (South Korea)

Author keywords

Nonvolatile memory; organic memory; PC interface; resistive switching

Indexed keywords

MEMORY CELL; MEMORY CELL ARRAYS; MEMORY PERFORMANCE; NON-VOLATILE; NON-VOLATILE MEMORIES; ORGANIC MEMORIES; ORGANIC MEMORY DEVICES; PC INTERFACES; RESISTIVE MEMORIES; RESISTIVE SWITCHING; RETENTION TIME; STATISTICAL DISTRIBUTION; SWITCHING BEHAVIORS;

CARRIER TRANSPORT;

SEMICONDUCTOR STORAGE;

EID: 84871782266     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2012.2226231     Document Type: Article

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