Compiler-directed dynamic frequency and voltage scheduling

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2008, Issue , 2001, Pages 65-81

  Hsu, Chung Hsing ^a   Kremer, Ulrich ^a   Hsiao, Michael ^b  

^a RUTGERS UNIVERSITY   (United States)

^b RUTGERS UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC FREQUENCY SCALING; ELECTRIC LOSSES; ENERGY CONSERVATION; VOLTAGE SCALING;

COMPILER OPTIMIZATIONS; DYNAMIC FREQUENCY; DYNAMIC VOLTAGE AND FREQUENCY SCALING; PERFORMANCE MODEL; POTENTIAL BENEFITS; PROGRAM EXECUTION; TARGET ARCHITECTURES; VOLTAGE SCHEDULING;

PROGRAM COMPILERS;

EID: 84871641368     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44572-2_6     Document Type: Conference Paper

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