-
1
-
-
34548040112
-
-
PhD thesis, Stanford University, Stanford, CA, USA, AAI3253463
-
J. H. Ahn. Memory and control organizations of stream processors. PhD thesis, Stanford University, Stanford, CA, USA, 2007. AAI3253463.
-
(2007)
Memory and Control Organizations of Stream Processors
-
-
Ahn, J.H.1
-
2
-
-
0034442456
-
Hoard: A scalable memory allocator for multithreaded applications
-
Nov.
-
E. D. Berger, K. S. McKinley, R. D. Blumofe, and P. R. Wilson. Hoard: a scalable memory allocator for multithreaded applications. SIGPLAN Not., 35(11):117-128, Nov. 2000.
-
(2000)
SIGPLAN Not.
, vol.35
, Issue.11
, pp. 117-128
-
-
Berger, E.D.1
McKinley, K.S.2
Blumofe, R.D.3
Wilson, P.R.4
-
4
-
-
0242696213
-
Mostly lock-free malloc
-
New York, NY, USA, ACM
-
D. Dice and A. Garthwaite. Mostly lock-free malloc. In ISMM '02, pages 163-174, New York, NY, USA, 2002. ACM.
-
(2002)
ISMM '02
, pp. 163-174
-
-
Dice, D.1
Garthwaite, A.2
-
5
-
-
84870715153
-
-
W. Gloger. ptmalloc. http://www.malloc.de/en/.
-
-
-
Gloger, W.1
-
6
-
-
0003960373
-
Optimizing dynamic memory management in a multithreaded application executing on a multiprocessor
-
Washington, DC, USA, IEEE.
-
D. Häggander and L. Lundberg. Optimizing dynamic memory management in a multithreaded application executing on a multiprocessor. In ICPP '98, pages 262-269, Washington, DC, USA, 1998. IEEE.
-
(1998)
ICPP '98
, pp. 262-269
-
-
Häggander, D.1
Lundberg, L.2
-
7
-
-
36049035884
-
Owens. Parallel Prefix Sum (Scan) with CUDA
-
H. Nguyen, editor, Addison Wesley, Aug.
-
M. Harris, S. Sengupta, and J. D. Owens. Parallel Prefix Sum (Scan) with CUDA. In H. Nguyen, editor, GPU Gems 3. Addison Wesley, Aug. 2007.
-
(2007)
GPU Gems 3
-
-
Harris, M.1
Sengupta, S.2
D, J.3
-
8
-
-
78249288442
-
XMalloc: A Scalable Lock-free Dynamic Memory Allocator for Many-core Machines
-
July
-
X. Huang, C. Rodrigues, S. Jones, I. Buck, and W. mei Hwu. XMalloc: A Scalable Lock-free Dynamic Memory Allocator for Many-core Machines. In Computer and Information Technology (CIT), 2010 IEEE, pages 1134 -1139, July 2010.
-
(2010)
Computer and Information Technology (CIT), 2010 IEEE
, pp. 1134-1139
-
-
Huang, X.1
Rodrigues, C.2
Jones, S.3
Buck, I.4
Hwu, W.M.5
-
9
-
-
34247275248
-
McRT-Malloc: A scalable transactional memory allocator
-
New York, NY, USA, ACM
-
R. L. Hudson, B. Saha, A. Adl-Tabatabai, and B. C. Hertzberg. McRT-Malloc: a scalable transactional memory allocator. In ISMM '06, pages 74-83, New York, NY, USA, 2006. ACM.
-
(2006)
ISMM '06
, pp. 74-83
-
-
Hudson, R.L.1
Saha, B.2
Adl-Tabatabai, A.3
Hertzberg, B.C.4
-
11
-
-
0012940667
-
Memory allocation for long-running server applications
-
October
-
P.-A. Larson and M. Krishnan. Memory allocation for long-running server applications. SIGPLAN Not., 34:176-185, October 1998.
-
(1998)
SIGPLAN Not.
, vol.34
, pp. 176-185
-
-
Larson, P.-A.1
Krishnan, M.2
-
12
-
-
77952837979
-
Gproximity: Hierarchical gpu-based operations for collision and distance queries
-
C. Lauterbach, Q. Mo, and D. Manocha. gproximity: Hierarchical gpu-based operations for collision and distance queries. Comput. Graph. Forum, 29(2):419-428, 2010.
-
(2010)
Comput. Graph. Forum
, vol.29
, Issue.2
, pp. 419-428
-
-
Lauterbach, C.1
Mo, Q.2
Manocha, D.3
-
13
-
-
0004341535
-
-
unix/Mail
-
D. Lea. A memory allocator. unix/Mail, http://gee.cs.oswego.edu/dl/html/ malloc.html, 1996.
-
(1996)
A Memory Allocator
-
-
Lea, D.1
-
14
-
-
44849137198
-
NVIDIA tesla: A unified graphics and computing architecture
-
Apr.
-
E. Lindholm, J. Nickolls, S. Oberman, and J. Montrym. NVIDIA tesla: A unified graphics and computing architecture. Micro, IEEE, 28(2):39-55, Apr. 2008.
-
(2008)
Micro, IEEE
, vol.28
, Issue.2
, pp. 39-55
-
-
Lindholm, E.1
Nickolls, J.2
Oberman, S.3
Montrym, J.4
-
15
-
-
8444252172
-
Scalable lock-free dynamic memory allocation
-
June
-
M. M. Michael. Scalable lock-free dynamic memory allocation. SIGPLAN Not., 39(6):35-46, June 2004.
-
(2004)
SIGPLAN Not.
, vol.39
, Issue.6
, pp. 35-46
-
-
Michael, M.M.1
-
16
-
-
70449643566
-
Memory performance and cache coherency effects on an intel nehalem multiprocessor system
-
D. Molka, D. Hackenberg, R. Schone, and M. Muller. Memory performance and cache coherency effects on an intel nehalem multiprocessor system. In Parallel Architectures and Compilation Techniques, 2009. PACT '09., pages 261-270, 2009.
-
(2009)
Parallel Architectures and Compilation Techniques, 2009. PACT '09
, pp. 261-270
-
-
Molka, D.1
Hackenberg, D.2
Schone, R.3
Muller, M.4
-
17
-
-
0005426073
-
Inflated speedups in parallel simulations via malloc()
-
D. M. Nicol. Inflated speedups in parallel simulations via malloc(). International Journal on Simulation, 2:413-426, 1992.
-
(1992)
International Journal on Simulation
, vol.2
, pp. 413-426
-
-
Nicol, D.M.1
-
20
-
-
84870724651
-
2701 San Tomas Expressway, Santa Clara 95050, USA
-
NVIDIA Corporation, 4.0 edition, May
-
NVIDIA Corporation, 2701 San Tomas Expressway, Santa Clara 95050, USA. CUDA C Best Practices Guide, 4.0 edition, May 2011.
-
(2011)
CUDA C Best Practices Guide
-
-
-
21
-
-
0025436383
-
Skip lists: A probabilistic alternative to balanced trees
-
June
-
W. Pugh. Skip lists: a probabilistic alternative to balanced trees. Commun. ACM, 33:668-676, June 1990.
-
(1990)
Commun. ACM
, vol.33
, pp. 668-676
-
-
Pugh, W.1
-
22
-
-
34247273005
-
Scalable locality-conscious multithreaded memory allocation
-
New York, NY, USA, ACM
-
S. Schneider, C. D. Antonopoulos, and D. S. Nikolopoulos. Scalable locality-conscious multithreaded memory allocation. In ISMM '06, pages 84-94, New York, NY, USA, 2006. ACM.
-
(2006)
ISMM '06
, pp. 84-94
-
-
Schneider, S.1
Antonopoulos, C.D.2
Nikolopoulos, D.S.3
-
23
-
-
57649106258
-
Larrabee: A many-core x86 architecture for visual computing
-
New York, NY, USA
-
L. Seiler, D. Carmean, E. Sprangle, T. Forsyth, M. Abrash, P. Dubey, S. Junkins, A. Lake, J. Sugerman, R. Cavin, R. Espasa, E. Grochowski, T. Juan, and P. Hanrahan. Larrabee: a many-core x86 architecture for visual computing. In ACM SIGGRAPH '08, pages 18:1-18:15, New York, NY, USA, 2008.
-
(2008)
ACM SIGGRAPH '08
-
-
Seiler, L.1
Carmean, D.2
Sprangle, E.3
Forsyth, T.4
Abrash, M.5
Dubey, P.6
Junkins, S.7
Lake, A.8
Sugerman, J.9
Cavin, R.10
Espasa, R.11
Grochowski, E.12
Juan, T.13
Hanrahan, P.14
-
24
-
-
84863017234
-
Sfmalloc: A lock-free and mostly synchronization-free dynamic memory allocator for manycores
-
Washington, DC, USA, IEEE Computer Society
-
S. Seo, J. Kim, and J. Lee. Sfmalloc: A lock-free and mostly synchronization-free dynamic memory allocator for manycores. In PACT '11, pages 253-263, Washington, DC, USA, 2011. IEEE Computer Society.
-
(2011)
PACT '11
, pp. 253-263
-
-
Seo, S.1
Kim, J.2
Lee, J.3
-
26
-
-
57749174539
-
Real-time kd-tree construction on graphics hardware
-
December
-
K. Zhou, Q. Hou, R. Wang, and B. Guo. Real-time kd-tree construction on graphics hardware. ACM Trans. Graph., 27:126:1-126:11, December 2008.
-
(2008)
ACM Trans. Graph.
, vol.27
-
-
Zhou, K.1
Hou, Q.2
Wang, R.3
Guo, B.4
|