A 123μW standby power technique with EM-tolerant 1.8V I/O NMOS power switch in 28nm HKMG technology

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2012, Pages

  Fukuoka, K ^a   Mori, R ^a   Kato, A ^a   Igarashi, M ^a   Shibutani, K ^a   Yamaki, T ^a   Tanaka, S ^a   Nii, K ^a   Morita, S ^a   Koike, T ^b   Sakamoto, N ^b  

^a INTERSIL CORPORATION   (United States)

^b Renesas Mobile Corporation   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE LEAKAGE; CHANNEL UTILIZATION; CONVENTIONAL TECHNIQUES; CPU CORES; FULL-CORE; LEAKAGE POWER; MAGNITUDE REDUCTION; MOBILE PROCESSORS; OPERATION MODE; POWER SWITCHES; POWER-GATING; STANDBY POWER;

INTEGRATED CIRCUITS;

LEAKAGE CURRENTS;

EID: 84869396390     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2012.6330708     Document Type: Conference Paper

References (7)

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6. H. Mair, et al., "A 65-nm mobile multimedia applications processor with an adaptive power manamement scheme to compensate for variations," Symp. VLSI Circuits, pp. 224-225, June 2007.
7. N. Maeda et al., "A 0.14uA standby leakage 32Kb embedded SRAM with low-voltage resume-standby utilizing all ditital current comparator in 28nm HKMG CMOS," Symp. VLSI Circuits, June 2012. (to be published)