-
1
-
-
84869032411
-
-
2 [Online]. Available
-
K. GREENE. (2008, 2) A memory breakthrough. [Online]. Available: http://www.technologyreview.com/Infotech/20148/
-
(2008)
A Memory Breakthrough
-
-
Greene, K.1
-
4
-
-
84860661333
-
A 20nm 1.8v 8gb pram with 40mb/s program bandwidth
-
Y. Choi, I. Song, M.-H. Park, H. Chung, S. Chang, B. Cho, J. Kim, Y. Oh, D. Kwon, J. Sunwoo, J. Shin, Y. Rho, C. Lee, M. G. Kang, J. Lee, Y. Kwon, S. Kim, J. Kim, Y.-J. Lee, Q. Wang, S. Cha, S. Ahn, H. Horii, J. Lee, K. Kim, H. Joo, K. Lee, Y.-T. Lee, J. Yoo, and G. Jeong, "A 20nm 1.8v 8gb pram with 40mb/s program bandwidth," in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International, feb. 2012, pp. 46-48.
-
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International, Feb. 2012
, pp. 46-48
-
-
Choi, Y.1
Song, I.2
Park, M.-H.3
Chung, H.4
Chang, S.5
Cho, B.6
Kim, J.7
Oh, Y.8
Kwon, D.9
Sunwoo, J.10
Shin, J.11
Rho, Y.12
Lee, C.13
Kang, M.G.14
Lee, J.15
Kwon, Y.16
Kim, S.17
Kim, J.18
Lee, Y.-J.19
Wang, Q.20
Cha, S.21
Ahn, S.22
Horii, H.23
Lee, J.24
Kim, K.25
Joo, H.26
Lee, K.27
Lee, Y.-T.28
Yoo, J.29
Jeong, G.30
more..
-
5
-
-
79952159806
-
Pram technology: From non volatility to high performances
-
D. Ahn, S. Cho, H. Horii, D. Im, I.-S. Kim, G. Oh, S. Park, M. Kang, S. Nam, and C. Chung, "Pram technology: from non volatility to high performances," Proceedings of European Phase Change and Ovonics Symposium (E/PCOS), vol. 9, pp. 87-91, 2010.
-
(2010)
Proceedings of European Phase Change and Ovonics Symposium (E/PCOS)
, vol.9
, pp. 87-91
-
-
Ahn, D.1
Cho, S.2
Horii, H.3
Im, D.4
Kim, I.-S.5
Oh, G.6
Park, S.7
Kang, M.8
Nam, S.9
Chung, C.10
-
6
-
-
77957886054
-
High performance pram cell scalable to sub-20nm technology with below 4f2 cell size, extendable to dram applications
-
I. Kim, S. Cho, D. Im, E. Cho, D. Kim, G. Oh, D. Ahn, S. Park, S. Nam, J. Moon, and C. Chung, "High performance pram cell scalable to sub-20nm technology with below 4f2 cell size, extendable to dram applications," in VLSI Technology (VLSIT), 2010 Symposium on, june 2010, pp. 203 -204.
-
VLSI Technology (VLSIT), 2010 Symposium on, June 2010
, pp. 203-204
-
-
Kim, I.1
Cho, S.2
Im, D.3
Cho, E.4
Kim, D.5
Oh, G.6
Ahn, D.7
Park, S.8
Nam, S.9
Moon, J.10
Chung, C.11
-
7
-
-
77957792027
-
Pram and nand flash hybrid architecture based on hot data detection
-
aug.
-
J. S. Park, H.-S. Kim, K.-S. Chung, and T. H. Han, "Pram and nand flash hybrid architecture based on hot data detection," in Mechanical and Electronics Engineering (ICMEE), 2010 2nd International Conference on, vol. 1, aug. 2010, pp. V1-93-V1-97.
-
(2010)
Mechanical and Electronics Engineering (ICMEE), 2010 2nd International Conference on
, vol.1
-
-
Park, J.S.1
Kim, H.-S.2
Chung, K.-S.3
Han, T.H.4
-
8
-
-
70349254286
-
A pram and nand flash hybrid architecture for high-performance embedded storage subsystems
-
J. K. Kim, H. G. Lee, S. Choi, and K. I. Bahng, "A pram and nand flash hybrid architecture for high-performance embedded storage subsystems," in Proceedings of the 8th ACM international conference on Embedded software, New York, NY, USA, 2008, pp. 31-40.
-
Proceedings of the 8th ACM International Conference on Embedded Software, New York, NY, USA, 2008
, pp. 31-40
-
-
Kim, J.K.1
Lee, H.G.2
Choi, S.3
Bahng, K.I.4
-
9
-
-
70350714582
-
Pdram: A hybrid pram and dram main memory system
-
G. Dhiman, R. Ayoub, and T. Rosing, "Pdram: A hybrid pram and dram main memory system," in Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE, july 2009, pp. 664 -669.
-
Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE, July 2009
, pp. 664-669
-
-
Dhiman, G.1
Ayoub, R.2
Rosing, T.3
-
10
-
-
70450273507
-
Scalable high performance main memory system using phase-change memory technology
-
Jun.
-
M. K. Qureshi, V. Srinivasan, and J. A. Rivers, "Scalable high performance main memory system using phase-change memory technology," The ACM Special Interest Group on Computer Architecture (SIGARCH), vol. 37, no. 3, pp. 24-33, Jun. 2009.
-
(2009)
The ACM Special Interest Group on Computer Architecture (SIGARCH)
, vol.37
, Issue.3
, pp. 24-33
-
-
Qureshi, M.K.1
Srinivasan, V.2
Rivers, J.A.3
-
11
-
-
79959297216
-
Migration based page caching algorithm for a hybrid main memory of dram and pram
-
H. Seok, Y. Park, and K. H. Park, "Migration based page caching algorithm for a hybrid main memory of dram and pram," in Proceedings of the 2011 ACM Symposium on Applied Computing, 2011, pp. 595-599.
-
Proceedings of the 2011 ACM Symposium on Applied Computing, 2011
, pp. 595-599
-
-
Seok, H.1
Park, Y.2
Park, K.H.3
|