-
1
-
-
84864278119
-
Hidden attractor in smooth chua systems
-
Sep
-
G. A. Leonov, N. V. Kuznetsov, and V. I. Vagaitsev, "Hidden attractor in smooth Chua systems," Phys. D, Nonlin. Phenom., vol. 241, no. 18, pp. 1482-1486, Sep. 2012.
-
(2012)
Phys. D, Nonlin. Phenom.
, vol.241
, Issue.18
, pp. 1482-1486
-
-
Leonov, G.A.1
Kuznetsov, N.V.2
Vagaitsev, V.I.3
-
2
-
-
0037607847
-
Investigation of a piecewise linear dynamical system with three parameters
-
N. A. Gubar, "Investigation of a piecewise linear dynamical system with three parameters," J. Appl. Math. Mech, vol. 25, no. 6, pp. 1519-1535, 1961.
-
(1961)
J. Appl. Math. Mech
, vol.25
, Issue.6
, pp. 1519-1535
-
-
Gubar, N.A.1
-
5
-
-
0038721321
-
Extraction of instantaneous and RMS sinusoidal jitter using an analytic signal method
-
Jun.
-
T. J. Yamaguchi,M. Soma, M. Ishida, T.Watanabe, and T. Ohmi, "Extraction of instantaneous and RMS sinusoidal jitter using an analytic signal method," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 50, no. 6, pp. 288-298, Jun. 2003.
-
(2003)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process.
, vol.50
, Issue.6
, pp. 288-298
-
-
Yamaguchi, T.J.1
Soma, M.2
Ishida, M.3
Watanabe, T.4
Ohmi, T.5
-
6
-
-
0344430049
-
A behavioral modeling approach to the design of a low jitter clock source
-
Nov.
-
G. Manganaro, S. U. Kwak, S. Cho, and A. Pulincherry, "A behavioral modeling approach to the design of a low jitter clock source," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 50, no. 11, pp. 804-814, Nov. 2003.
-
(2003)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process.
, vol.50
, Issue.11
, pp. 804-814
-
-
Manganaro, G.1
Kwak, S.U.2
Cho, S.3
Pulincherry, A.4
-
7
-
-
0036055584
-
Phase-locked loops: A control centric tutorial
-
D. Abramovitch, "Phase-locked loops: A control centric tutorial," in Proc. Amer. Control Conf., 2002, vol. 1, pp. 1-15.
-
(2002)
Proc. Amer. Control Conf.
, vol.1
, pp. 1-15
-
-
Abramovitch, D.1
-
11
-
-
50849117039
-
Computation of phase detector characteristics in phaselocked loops for clock synchronization
-
Aug.
-
G. A. Leonov, "Computation of phase detector characteristics in phaselocked loops for clock synchronization," Doklady Math., vol. 78, no. 1, pp. 643-645, Aug. 2008.
-
(2008)
Doklady Math.
, vol.78
, Issue.1
, pp. 643-645
-
-
Leonov, G.A.1
-
12
-
-
22144478693
-
Stability and bifurcations of phaselocked loops for digital signal processors
-
G. A. Leonov and S. M. Seledzhi, "Stability and bifurcations of phaselocked loops for digital signal processors," Int. J. Bifurcation Chaos, vol. 15, no. 4, pp. 1347-1360, 2005.
-
(2005)
Int. J. Bifurcation Chaos
, vol.15
, Issue.4
, pp. 1347-1360
-
-
Leonov, G.A.1
Seledzhi, S.M.2
-
13
-
-
74549150075
-
Analysis and design of computer architecture circuits with controllable delay line
-
SPSMC INSTICC Press, Setubal, Portugal
-
N. V. Kuznetsov, G. A. Leonov, S. M. Seledzhi, and P. Neittaanmäki, "Analysis and design of computer architecture circuits with controllable delay line," in Proc. 6th ICINCO, 2009, vol. 3 SPSMC, pp. 221-224, INSTICC Press, Setubal, Portugal.
-
(2009)
Proc. 6th ICINCO
, vol.3
, pp. 221-224
-
-
Kuznetsov, N.V.1
Leonov, G.A.2
Seledzhi, S.M.3
Neittaanmäki, P.4
-
14
-
-
80655145021
-
Computation of phase detector characteristics in synchronization systems
-
Aug
-
G. A. Leonov, N. V. Kuznetsov, M. V. Yuldashev, and R. V. Yuldashev, "Computation of phase detector characteristics in synchronization systems," Doklady Math., vol. 84, no. 1, pp. 586-590, Aug. 2011.
-
(2011)
Doklady Math.
, vol.84
, Issue.1
, pp. 586-590
-
-
Leonov, G.A.1
Kuznetsov, N.V.2
Yuldashev, M.V.3
Yuldashev, R.V.4
-
15
-
-
80052640354
-
Analytical methods for computation of phase-detector characteristics and PLL design
-
N. V. Kuznetsov, G. A. Leonov, M. V. Yuldashev, and R. V. Yuldashev, "Analytical methods for computation of phase-detector characteristics and PLL design," in Proc. ISSCS, 2011, pp. 7-10.
-
(2011)
Proc. ISSCS
, pp. 7-10
-
-
Kuznetsov, N.V.1
Leonov, G.A.2
Yuldashev, M.V.3
Yuldashev, R.V.4
-
16
-
-
80052600414
-
High-frequency analysis of phaselocked loop and phase detector characteristic computation
-
N. V. Kuznetsov, P. Neittaanmäki, G. A. Leonov, S. M. Seledzhi, M. V. Yuldashev, and R. V. Yuldashev, "High-frequency analysis of phaselocked loop and phase detector characteristic computation," in Proc. 8th ICINCO, 2011, vol. 1, pp. 272-278.
-
(2011)
Proc. 8th ICINCO
, vol.1
, pp. 272-278
-
-
Kuznetsov, N.V.1
Neittaanmäki, P.2
Leonov, G.A.3
Seledzhi, S.M.4
Yuldashev, M.V.5
Yuldashev, R.V.6
-
17
-
-
84861451048
-
Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycleslipping due to loop non-idealities and supply noise
-
ACM, New York
-
L. Xiaolue, W. Yayun, and R. Jaijeet, "Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycleslipping due to loop non-idealities and supply noise," in Proc. Asia South Pac. Des. Autom. Conf., 2005, pp. 459-464, ACM, New York.
-
(2005)
Proc. Asia South Pac. Des. Autom. Conf.
, pp. 459-464
-
-
Xiaolue, L.1
Yayun, W.2
Jaijeet, R.3
-
18
-
-
0033700459
-
Phase noise in oscillators: A unifying theory and numerical methods for characterization
-
May
-
A. Demir, A. Mehrotra, and J. Roychowdhury, "Phase noise in oscillators: A unifying theory and numerical methods for characterization," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 47, no. 5, pp. 655-674, May 2000.
-
(2000)
IEEE Trans. Circuits Syst. I, Fundam. Theory Appl.
, vol.47
, Issue.5
, pp. 655-674
-
-
Demir, A.1
Mehrotra, A.2
Roychowdhury, J.3
-
22
-
-
84867874684
-
-
Patent 2 010 149 471/08(071 509) (RU) Oct. 27
-
N. V. Kuznetsov, G. A. Leonov, S. M. Seledzhi, M. V. Yuldashev, and R. V. Yuldashev, "Method for determining the operating parameters of phase-locked oscillator frequency and device for its implementation," Patent 2 010 149 471/08(071 509) (RU), Oct. 27, 2011.
-
(2011)
Method for Determining the Operating Parameters of Phase-locked Oscillator Frequency and Device for Its Implementation
-
-
Kuznetsov, N.V.1
Leonov, G.A.2
Seledzhi, S.M.3
Yuldashev, M.V.4
Yuldashev, R.V.5
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