Implication logic synthesis methods for memristors

ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2012, Pages 2441-2444

  Lehtonen, Eero ^a   Poikonen, Jussi ^b   Laiho, Mika ^a  

^a UNIVERSITY OF TURKU   (Finland)

^b AALTO UNIVERSITY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL SEQUENCES; LOGIC SYNTHESIS; MULTIINPUT; PARITY FUNCTIONS; SYNTHESIS METHOD;

BOOLEAN FUNCTIONS;

EID: 84866627551     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2012.6271792     Document Type: Conference Paper

References (10)

1. Chua, L. O. : "Memristor-The Missing Circuit Element", IEEE Transactions on Circuit Theory, vol. CT-18, no. 5, pp. 507-519, 1971.
2. Chua, L. O., S. M. Kang: "Memristive Devices and Systems", Proceedings of the IEEE, vol. 64, no. 2, pp. 209-223, 1976.
3. Strukov, D. B., Snider, G. S., Stewart, D. R., Williams, R. S. : "The missing memristor found", Nature, vol. 453, pp. 80-83, 2008.
4. Strukov, D. B. et al. : "Hybrid CMOS/Memristor Circuits", Proc. IEEE International Symposium on Circuits and Systems 2010, pp. 1967-1970, 2010.
5. Kuekes, P. J. : "Material implication: Digital logic with memristors", a presentation in the Memristor and Memristive Systems Symposium at UC Berkeley, 2008.
6. Borghetti, J., Snider, G. S., Kuekes, P. J., Yang, J. J., Steward, D. R., Williams, R. S. : "'Memristive' switches enable 'stateful' logic operations via material implication", Nature, vol. 464, pp. 873-876, 2010.
7. Lehtonen, E., Laiho, M. : "Stateful implication logic with memristors", Proc. IEEE/ACM International Symposium on Nanoscale Architectures 2009, pp. 33-36, 2009.
8. Lehtonen, E., Poikonen, J. H., Laiho, M. : "Two Memristors Suffice to Compute All Boolean Functions", IET Electronic Letters, vol. 46, pp. 239-240, 2010.
9. Poikonen, J. H., Lehtonen, E., Laiho, M. : "On synthesis of Boolean expressions for memristive devices using sequential implication logic", accepted for publication in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2012.
10. Pershin, Y. V., Di Ventra, M. : "Neuromorphic, digital and quantum computation with memory circuit elements", available at arXive:1009. 6025.